Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Kenji Isomoto

Hideto Sugawara

Chisato Furukawa

Masayuki Ishikawa

Masanobu Iwamoto

Akira Tanaka

Katsufumi Kondo

Hiroaki Ootsuka

A semiconductor light-emitting device includes a substrate having a first energy bandgap, a first semiconductor layers on the substrate, an active layer on the first semiconductor layer, and a second semiconductor layer on the active layer. The active layer includes a quantum well layer, and a first barrier layer between the first semiconductor layer and the quantum well layer. The first semiconductor layer has a second energy bandgap wider than the first energy bandgap. The quantum well layer has a third energy bandgap narrower than the first and second energy bandgaps. The second semiconductor layer has a fourth energy bandgap wider than the third energy bandgap. The substrate has a refractive index greater than a refractive index of the first semiconductor layer. The refractive index of the first semiconductor layer is not less than a refractive index of the first barrier layer.

Semiconductor light-emitting device and optical coupling device

According to one embodiment, an optical semiconductor element includes a substrate, a light emitting layer, and a distributed Bragg reflector. The light emitting layer includes an AlGaAs multi quantum well layer. The distributed Bragg reflector is provided between the substrate and the light emitting layer. A pair of a first layer and a second layer is periodically stacked in the distributed Bragg reflector. The first layer includes AlGaAs. The second layer includes In(AlGa)P. A refractive index nof the first layer is higher than a refractive index nof the second layer. The first layer has a thickness larger than &#x3bb;0/(4n) where &#x3bb;0 is a center wavelength of a band on wavelength distribution of a reflectivity of the distributed Bragg reflector. The second layer has a thickness smaller than &#x3bb;0/(4n).

Optical semiconductor element

A method for manufacturing a light emitting device, includes: preparing a first substrate by slicing a single crystal ingot pulled in a pulling direction tilted with respect to a first plane orientation, the slicing being in a direction substantially perpendicular to the pulling direction; preparing a second substrate including a major surface having a plane orientation substantially parallel to a plane orientation of a major surface of the first substrate; growing a stacked unit as a crystal on the major surface of the second substrate, the stacked unit including a light emitting layer; and removing the second substrate after bonding the stacked unit and the major surface of the first substrate by heating them in a joined state. A plane orientation of the major surface of the first substrate and a plane orientation of the major surface of the second substrate are one or another selected from a plane tilted from a (100) plane toward a [011] direction and a plane tilted from a (&#x2212;100) plane toward a [0-1-1] direction, respectively.

Method for manufacturing light emitting device and light emitting device

A light emitting device has an N-type gallium nitride system compound semiconductor layer provided on a substrate; and a P-type gallium nitride system compound semiconductor layer provided on said N-type gallium nitride system compound semiconductor layer. The N-type gallium nitride compound semiconductor layer has such an area that an impurity concentration increases corresponding to a layer thickness from the side of said substrate.

Light emitting device having flat growth GaN layer

After p-type gallium nitride compound semiconductor layers, to which p-type impurity is added, are formed by virtue of chemical vapor deposition, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. while supplying a flow of an inert gas in parallel to a substrate surface at a predetermined flow rate or more. Otherwise, the p-type gallium nitride compound semiconductor layers are thermally annealed at more than 400.degree. C. or more than 700.degree. C. in an inert gas atmosphere having a predetermined pressure or more. According to the annealing process, the p-type impurity can be more effectively activated, so that p-type gallium nitride compound semiconductor layers which have fewer crystal defects, etc. and have lower resistivity can be formed.

P-type GaN compound semiconductor and method for manufacturing the same

A substrate for forming a compound semiconductor device is placed in a reaction chamber. An MOCVD method or a GS-MBE method is used to grow compound semiconductor layers on the substrate. The grown layers include, for example, a GaN buffer layer, an n-GaN layer, an InGaN active layer, a p-AlGaN layer, and a p.sup.+ -GaN contact layer. After the growth of the layers, the substrate is kept in the reaction chamber, and a passivation film of, for example, SiNx, SiO2, or SiON is formed on top of the grown layers according to a CVD or GS-MBE method. Since the top of the grown layers is not exposed to air outside the reaction chamber, no oxidization or contamination occurs on the top of the grown layers. The compound semiconductor device is manufactured through simpler processes compared with a prior art that needs separate apparatuses for growing and forming the layers and passivation film.

Growing community of inventors

Kanazawa, Japan

Kenji Isomoto