Hitachi, Ltd.

Kenji Ando

Akio Nakashima

Yoshihiro Arakawa

Masahiro Sakashita

Shunji Iwabuchi

Mitsushige Tsukada

Takao Sekimoto

A budget compilation process for executing budget compilation for a plurality of bank branch offices is executed in parallel at the same time. Process conditions (participant clients in the budget compilation process, and etc.) are inputted to an input/output control unit, and in accordance with the process conditions, a data server starts up a client to execute the budget compilation process. By referring to a scheduling file formed by a budget compilation process start-up unit, the client determines a branch office for which the budget compilation process is executed. In this manner, clients execute the budget compilation process for the subject branch offices in parallel at the same time. The execution state of the budget compilation process can be monitored on a display screen, and an operator can instruct to stop the operation of the whole network at the intermediate of the operation.

System and method for budget compilation under parallel/distributed

A vertical deflection output circuitry for a television receiver wherein two transistors are connected in single ended and push-pull relation, and the output junction point of the two transistors is connected, to a D.C. power source for supplying a higher voltage than that of a power source for the vertical deflection output circuitry, through a switch which is turned off during the vertical scan period and turned on during the vertical retrace period.

Vertical deflection output circuitry for television receiver

Growing community of inventors

Yokohama, Japan

Kenji Ando