Rohm Co., Ltd.

Kenichi Yoshimochi

Koshun Saito

Kentaro Chikamatsu

Hiroyuki Sakairi

Yasufumi Matsuoka

A semiconductor device provided with first and second semiconductor element each having an obverse and a reverse surface with a drain electrode, source electrode and gate electrode provided on the obverse surface. The semiconductor device is also provided with a control element electrically connected to the gate electrodes of the respective semiconductor elements, and with a plurality of leads, which include a first lead carrying the first semiconductor element, a second lead carrying the second semiconductor element, and a third lead carrying the control element. The first and second leads overlap with each other as viewed in a first direction perpendicular to the thickness direction of the semiconductor device, and the third lead overlaps with the first and second leads as viewed in a second direction perpendicular to the thickness direction and the first direction.

Semiconductor device

A semiconductor device includes a lead frame, a transistor, and an encapsulation resin. The lead frame includes a drain frame, a source frame, and a gate frame. The drain frame includes drain frame fingers. The source frame includes source frame fingers. The drain frame fingers and the source frame fingers are alternately arranged in a first direction and include overlapping portions as viewed from a first direction. In a region where each drain frame finger overlaps the source frame fingers as viewed in the first direction, at least either one of the drain frame fingers and the source frame fingers are not exposed from the back surface of the encapsulation resin.

A semiconductor device includes a semiconductor layer which has a first device formation region and a second device formation region, a first HEMT which is formed in the first device formation region and has a first two-dimensional electron gas region as a channel, a second HEMT which is formed in the second device formation region and has a second two-dimensional electron gas region as a channel, and a region separation structure which is formed in the semiconductor layer and defines the first device formation region and the second device formation region.

A nitride semiconductor device includes: a Si substrate having a surface and a rear surface; a first nitride semiconductor layer arranged on the surface of the Si substrate and constituting an electron transit layer; a second nitride semiconductor layer formed on the first nitride semiconductor layer and constituting an electron supply layer; a gate electrode arranged on the second nitride semiconductor layer; a source electrode and a drain electrode arranged on the second nitride semiconductor layer so as to be separated from the gate electrode with the gate electrode interposed therebetween, and electrically connected to the second nitride semiconductor layer; at least one recess formed on the Si substrate and recessed from the rear surface toward the surface of the Si substrate; and a thermal conductor embedded in the at least one recess and made of material having a thermal conductivity higher than a thermal conductivity of the Si substrate.

Nitride semiconductor device

There is provided a nitride semiconductor device, including: a Si substrate including a front surface and a back surface; a buffer layer formed over the Si substrate; a first nitride semiconductor layer formed over the buffer layer; a second nitride semiconductor layer formed over the first nitride semiconductor layer; a gate electrode disposed over the second nitride semiconductor layer; a source electrode and a drain electrode electrically connected to the second nitride semiconductor layer, and disposed over the second nitride semiconductor layer to be spaced apart from the gate electrode that is interposed between the source electrode and the drain electrode; a back surface electrode pad formed over the back surface of the Si substrate; and a conductive path formed in the Si substrate, the buffer layer, the first nitride semiconductor layer, and the second nitride semiconductor layer.

Semiconductor module

The semiconductor device includes a semiconductor substrate, a plurality of source regions formed in a stripe shape on the semiconductor substrate, a plurality of gate electrodes formed in a stripe shape between a plurality of the stripe shaped source regions on the semiconductor substrate, an insulating film for covering the source regions and the gate electrodes, the insulating film including a contact hole for partly exposing the source regions in a part of a predetermined region with respect to a longitudinal direction of the source regions; and a source electrode formed on the insulating film and electrically connected to the source region via the contact hole.

Semiconductor device and method for manufacturing same

A module () includes a first functional device () and a second functional device (). The first functional device () includes a base electrode, an emitter electrode and a collector electrode. The second functional device () includes at least one electrode. The module () further includes a conductive frame (). One of the base electrode, the emitter electrode, and the collector electrode of the first functional device () is directly connected to the frame (). The electrode of the second functional device () is also directly connected to the frame (). The frame () includes a portion serving as a terminal for external connection.

High efficiency module

A semiconductor device that has a source region, a channel region, and a drain region disposed in order from a surface of the semiconductor device in a thickness direction of a semiconductor substrate. The semiconductor device includes a gate insulating film having an extended portion that covers the surface of the semiconductor substrate outside of a gate trench and a top surface of a polysilicon gate. A connection gate trench branches from the gate trench, and joins a contact gate trench which is wider than the gate trench and the connection gate trench. The polysilicon gate is embedded in the connection gate trench and the contact gate, and extends from the gate trench to the contact gate trench through the connection gate trench. The gate contact groove is formed in the polysilicon gate within the contact gate trench.

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Kyoto, Japan

Kenichi Yoshimochi