Murata Manufacturing Co., Ltd.

Renesas Electronics Corporation

Renesas Technology Corp.

Hitachi Hybrid Network Co., Ltd.

Kenichi Shimamoto

Satoshi Tanaka

Tadashi Matsuoka

Kenji Tahara

Takayuki Tsutsui

Takashi Yamada

Hisanori Namie

Kenji Sasaki

Kazuo Watanabe

Norio Hayashi

Yusuke Tanaka

Yoshiki Kogushi

Kazuma Sugiura

Atsushi Kurokawa

Masatoshi Hase

Satoshi Goto

Yuri Honda

Fumio Harima

Takeshi Kogure

Mitsunori Samata

Syunji Yoshimi

Shigeru Tsuchida

Hiroaki Tokuya

Yoshiaki Harasawa

Yoshiaki Sukemori

Toshiki Matsui

Kouichi Matsushita

Takayuki Kawano

Kazuhiro Ikarashi

Hideyuki Sato

Kazuhiro Koshio

Kazuhiko Ishimoto

Ryoki Shikishima

A power amplifier circuit includes first and second bias circuits to each apply a bias to first and second amplifiers in first and second modes, respectively. The first bias circuit includes: a first transistor having a collector connected to a power supply electric potential, an emitter connected to the first amplifier, and a base connected to a current source; and a second transistor and a third transistor being diode-connected and connected between the base of the first transistor and a reference electric potential. The second bias circuit includes: a fourth transistor having a collector connected to a power supply electric potential, an emitter connected to the second amplifier, and a base connected to a current source; and a fifth transistor having a base connected to the emitter of the fourth transistor, a collector connected to the base of the fourth transistor, and an emitter connected to a reference electric potential.

Power amplifier circuit

Gain is suppressed. In a power amplification circuit, a first transistor has a first input terminal, a first output terminal, and a first ground terminal. A second transistor has a second input terminal, a second output terminal, and a second ground terminal. The second input terminal is connected to the first input terminal. The second output terminal is connected to the first output terminal. A first bias circuit is connected to the first input terminal. A second bias circuit is connected to the second input terminal. A first resistor is connected between the first ground terminal and the ground. A second resistor is connected between the second ground terminal and the ground. The second resistor has a resistance value greater than that of the first resistor.

Power amplification circuit, radio-frequency circuit, and communication device

A power amplifier circuitincludes amplifiersand, bias circuitsand, and a control circuitthat controls the bias circuitsand. When the power amplifier circuitoperates in a low power mode, the control circuitcontrols the bias circuitand the bias circuitsuch that a bias current or voltage is supplied to the amplifierand a bias current or voltage is not supplied to the amplifier. When the power amplifier circuitoperates in a high power mode in which an output power is higher than an output power in the low power mode, the control circuitcontrols the bias circuitand the bias circuitsuch that a bias current or voltage is supplied to the amplifierand a bias current or voltage is supplied to the amplifier

Increase in power-added efficiency can be achieved. A second base of a second transistor is connected to a first collector of a first transistor. A third base of a third transistor is connected to the first collector of the first transistor, and a third collector of the third transistor is connected to a second collector of the second transistor. A second bias circuit includes a fifth transistor connected to the second base of the second transistor. A third bias circuit includes a sixth transistor connected to the third base of the third transistor. A first current limiting circuit includes a seventh transistor, a first collector resistor, and a first base resistor. A second current limiting circuit includes an eighth transistor, a second collector resistor, and a second base resistor.

Power amplifier circuit, high frequency circuit, and communication apparatus

The present disclosure facilitates impedance matching between a power amplifier and filters. A radio-frequency circuit includes a power amplifier, a plurality of transmit filters, a switch, a plurality of first matching networks, and a second matching network. The switch switches the plurality of transmit filters to be coupled to the power amplifier. The plurality of first matching networks are coupled between the plurality of transmit filters and the switch. The second matching network is coupled between the power amplifier and the switch. The second matching network includes a transmission line transformer.

Radio-frequency circuit and communication device

A power amplifier circuit according to the present disclosure includes an amplifier circuit serving as a differential amplifier circuit configured to be activated by a supply voltage that is variable in accordance with amplitude of a signal, a bias circuit configured to output a bias to be supplied to the amplifier circuit, and first and second dispersion circuits respectively provided for a pair of differential signals outputted from the amplifier circuit and configured to control dependence of gain of the differential amplifier circuit on the supply voltage.

A power amplifier circuit is provided that includes a transmission circuit, a control circuit, a first terminal, and a second terminal. The transmission circuit includes an amplifier element that amplifies power of a radio frequency signal. The control circuit controls the transmission circuit. The first terminal receives a serial data signal that is based on a serial data standard. The second terminal receives a digital signal different from the serial data signal. The control circuit then controls the transmission circuit in response to the digital signal received from the second terminal.

Power amplifier circuit, radio frequency circuit, communication device, radio frequency module, and amplification method

A power amplifier circuit includes a first amplifier that amplifies an input signal and outputs a first amplified signal, a second amplifier that is disposed subsequent to the first amplifier and that amplifies the first amplified signal and outputs a second amplified signal, and a clamp circuit that is disposed between ground and a signal line extending between the first amplifier and the second amplifier and that suppresses an amplitude of the first amplified signal.

A power amplifier includes a first transistor, a second transistor, and a third transistor that are formed on a semiconductor substrate, and a bump that is electrically connected to an emitter of the first transistor and that is provided so as to, when the semiconductor substrate is viewed in plan, overlay a first disposition region where the first transistor is disposed, a second disposition region where the second transistor is disposed, and a third disposition region where the third transistor is disposed.

Power amplifier, power amplifier circuit, and power amplifier device

A semiconductor chip has a first transistor that amplifies a first signal and outputs a second signal, a second transistor that amplifies the second signal and outputs a third signal, and a semiconductor substrate having a main surface parallel to a plane defined by first and second directions and which has the first and second transistors formed thereon. The main surface has thereon a first bump connected to a collector or drain of the first transistor, a second bump connected to an emitter or source of the first transistor, a third bump connected to a collector or drain of the second transistor, and a fourth bump connected to an emitter or source of the second transistor. The first bump is circular, the second through fourth bumps are rectangular or oval, and the area of each of the second through fourth bumps is larger than that of the first bump.

Semiconductor chip

A power amplifier circuit includes a first transistor disposed on a semiconductor substrate; a second transistor disposed on the semiconductor substrate and configured to supply a bias current based on a first current which is a part of a control current to the first transistor; a third transistor disposed on the semiconductor substrate and having a collector configured to be supplied with a second current which is a part of the control current and an emitter configured to output a third current based on the second current; a first bump electrically connected to an emitter of the first transistor and disposed so as to overlap a first disposition area in which the first transistor is disposed in plan view of the semiconductor substrate; and a second bump disposed so as to overlap a second disposition area in which the third transistor is disposed in the plan view.

Power amplifier circuit and semiconductor device

A power amplifier module includes first and second amplifiers, a first bias circuit, and an adjusting circuit. The first amplifier amplifies a first signal. The second amplifier amplifies a second signal based on an output signal from the first amplifier. The first bias circuit supplies a bias current to the first amplifier via a current path on the basis of a bias drive signal. The adjusting circuit includes an adjusting transistor having first, second, and third terminals. A first voltage based on a power supply voltage is supplied to the first terminal. A second voltage based on the bias drive signal is supplied to the second terminal. The third terminal is connected to the current path. The adjusting circuit adjusts the bias current on the basis of the power supply voltage supplied to the first amplifier.

Power amplifier module

A power amplification module includes a first transistor which amplifies and outputs a radio frequency signal input to its base; a current source which outputs a control current; a second transistor connected to an output of the current source, a first current from the control current input to its collector, a control voltage generation circuit connected to the output and which generates a control voltage according to a second current from the control current; a first FET, the drain being supplied with a supply voltage, the source being connected to the base of the first transistor, and the gate being supplied with the control voltage; and a second FET, the drain being supplied with the supply voltage, the source being connected to the base of the second transistor, and the gate being supplied with the control voltage.

Power amplification module

A power amplification circuit includes an amplification transistor, a variable voltage power supply that supplies a variable voltage to a collector of the amplification transistor, a bias circuit that has a constant current amplification transistor outputting a DC bias current to a base of the amplifier transistor, and a current limiting circuit that limits the DC bias current. The current limiting circuit includes a current limiting transistor, a resistor element connected to a collector of the current limiting transistor and the variable voltage power supply, and a resistor element connected to a base of the current limiting transistor and a base of the constant current amplifying transistor.

Growing community of inventors

Kyoto, Japan

Kenichi Shimamoto