Hitachi, Ltd.

Hitachi Device Engineering Co., Ltd.

Hitachi Device Eng.

Kenichi Ohata

Kazuo Kanetani

Kunihiko Yamaguchi

Goro Kitsukawa

Hiroaki Nambu

Masanori Odaka

Hisayuki Higuchi

Noriyuki Homma

Youji Idei

Nobuo Tamba

Masayuki Ohayashi

Toshiro Hiramoto

Noriyuki Honma

Yoshiaki Sakurai

Kayoko Saito

Hiroaki Nanbu

Kazuhiko Tani

Motoaki Matumoto

A semiconductor integrated circuit device including a level conversion circuit in which the simplifying of the circuit and the increasing of the speed of operation have been attained is provided. A pair of complementary output signals amplified to a required signal level by a current switch circuit including differential transistors which receive an input signal and a reference voltage are inputted into a pair of emitter follower circuits. An emitter follower output transistor is driven by an output signal from one emitter follower circuit, while an N-channel MOSFET provided between the output transistor and a current source used as a load is driven by an output signal from the other emitter follower circuit, to obtain a level-amplified output signal from an emitter of the output transistor. The speed of an operation of the circuit device can be increased to a high level owing to a simple circuit in which a level, which is required to attain an output amplitude, of complementary output signals is secured by the current switch circuit, the amplified complementary signals being inputted into the emitter follower circuit to directly drive the output transistor.

Semiconductor integrated circuit device and memory consisting of

Herein disclosed is a bipolar memory having redundancy, which can be produced with a small area. In this semiconductor memory having a body memory for storing data and a spare memory for relief of fault bit of the body memory, a row is selected by cutting fuses in a decoder. Fundamentally signal lines such as word lines are not provided with fuses. Other parts including a power source and a reference voltage source are provided with fuses without decreasing the operating speed accompanied by only a slight increase in the area.

Semiconductor memory having redundancy

Growing community of inventors

Tachikawa, Japan

Kenichi Ohata