Shinko Electric Industries Co., Ltd.

Fuji Electric Co., Ltd.

Kenichi Mori

Shotaro Yokoyama

Kei Murayama

Akinori Shiraishi

Yoshihiro Ihara

Kazuyuki Kubota

Takehito Terasawa

Yoshihiro Kita

A circuit board includes a substrate having an end surface, and a principal surface on which an electronic component is mounted, a first region, provided on the principal surface, and coated with a moistureproof agent, a second region, provided on the principal surface, and prohibited from being coated with the moistureproof agent, and a groove having two ends, formed in the principal surface, between the first region and the second region. The two ends of the groove reach the end surface of the substrate. The groove includes a guiding part, configured to guide the moistureproof agent overflowing from the first region into the groove, provided at a portion of the groove farthest away from the end surface.

Circuit board

A wireless power feeder includes a rotatable body and a non-rotatable body including a first surface and a second surface, respectively, that face each other at a predetermined distance, and a power receiving board and a power feeding board on the first surface and the second surface, respectively. The power receiving board includes a pair of first electrodes each including alternating first interconnect patterns and first slits in respective first regions bent at the first slits to form first corrugated parts where a distance from the first surface alternately increases and decreases. The power feeding board includes a pair of second electrodes each including alternating second interconnect patterns and second slits in respective second regions bent at the second slits to form second corrugated parts where a distance from the second surface alternately increases and decreases. The first and second corrugated parts face each other.

Wireless power feeder

A wiring substrate includes: a plurality of wiring layers; and a plurality of insulating layers. The wiring substrate includes: a mounting region on which an electronic component is to be mounted; and a non-mounting region on which no electronic component is to be mounted and which is configured to be bent in a first direction. At least one of the wiring layers comprises a shield pattern. The shield pattern disposed in the non-mounting region is defined by a plurality of through holes arranged at predetermined intervals. Each of the through holes has a bent portion bent in plan view.

Wiring substrate and semiconductor device

A wiring substrate includes a plurality of wiring layers, a component mounting part on which an electronic component can be mounted, and a component non-mounting part on which an electronic component cannot be mounted. A portion located in the component non-mounting part of one wiring layer of the plurality of the wiring layers includes a plurality of first through-holes having an elongated shape as seen from above and aligned with predetermined intervals with longitudinal directions of the first through-holes being faced toward a direction perpendicular to a longitudinal direction of the wiring substrate.

Wiring substrate

A circuit board module is electrically connectable to a socket by inserting one end part thereof into the socket, and includes a circuit board and a terminal board having a first surface provided with a column of socket-connection pads and mounted on the surface of the circuit board at the one end part. The terminal board includes first, second, and third pad columns provided on a second surface of the terminal board opposite to the first surface. The circuit board includes fourth, fifth, and sixth pad columns respectively provided on the surface of the circuit board opposing the second surface of the terminal board, at positions opposing the first, second, and third pad columns of the terminal board, respectively.

Circuit board module

There is provided a semiconductor device. The semiconductor device includes: a silicon substrate; a copper post connected to one surface of the silicon substrate; a semiconductor element having a linear expansion coefficient different from that of the silicon substrate; a metal layer provided between the semiconductor element and the silicon substrate to cover the copper post; a first alloy layer provided between the copper post and the semiconductor element, wherein the first alloy layer includes alloy of gold and a metal of the metal layer; and a second alloy layer provided between the metal layer and the semiconductor element, wherein the second alloy layer includes alloy of gold and the metal of the metal layer.

Semiconductor device

A wiring substrate includes a body including first and second surfaces, a trench having an opening on the first surface and including, a bottom surface, a side surface, and a slope surface that connects a peripheral part of the bottom surface to a one end part of the side surface and widens from the peripheral part to the one end part, the one end part being an end part opposite from the first surface, a hole including an end communicating with the bottom surface and another end being open on the second surface, a first layer filling at least a portion of the hole and including a top surface toward the trench, a second layer covering the top surface and formed on at least a portion of the trench except for a part of the side surface, and a third layer covering the second layer and filling the trench.

Wiring substrate and method for manufacturing wiring substrate

A method of detecting a phase difference between a pair of images of an object which are formed on a pair of optical sensor arrays through different optical paths, with presence of flare in one of the images, is disclosed. The method includes the steps of: preparing a sensor data group representing a pattern of each image and consisting of sensor data received from each optical sensor array; correcting the sensor data group so as to eliminate a difference in the average value of the sensor data between the optical sensor arrays; preparing a plurality of combinations each having two subgroups corresponding to the pair of optical sensor arrays, each subgroup consisting of a predetermined number of a series of sensor data, which are selected from the sensor data group corrected, such that a portion of the sensor data group from which the subgroup is selected is sequentially shifted; and selecting one of the combinations having a maximum degree of correlation between the subgroups, and detecting a phase difference from positions on the optical sensor arrays which correspond to the subgroups of the selected combination.

Method of detecting phase difference between a pair of images

In a method of measuring a distance, an evaluation function indicating a degree of coincidence of a pair of image data projected onto a pair of sensor arrays through a pair of focusing lenses is found, and a ratio of a valley value of a transition graph and a gradient of the transition graph are calculated by using a minimum and least value of the evaluation function and two values of the evaluation function adjacent to the minimum and least value. Then, the distance between the focusing lens pair and an object based on the evaluation function is calculated. Also, reliability of the calculated distance based on the calculated ratio is inspected. Thus, the calculated distance data is accurate and reliable.

Method for measuring a distance

An image data circuit compensates sensitivity differences in image detection between a pair of image sensors. The image sensors each include a plurality of charge storage type optical sensing elements. Correction data indicative of sensitivity difference between the image sensors is stored in permanent memory. A clock pulse generator circuit generates clock pulses for counting charge storage periods indicated by output signals from the optical sensing elements. A pair of counter circuits counts the clock pulses and outputs count values corrected with the correction data and corresponding to the charge storage periods. A pair of quantizing circuits converts the output signals to image data based on the corrected count values.

Image data circuit for correcting sensitivity differences between image

Corrective data for left and right sensor arrays of a range-finding optical system is stored as a difference between a maximum sensor output and a correction function. The stored data is taken while imaging a blank white target area. In use, the corrective data is added to outputs of each sensor. This technique reduces the number of storage bits required per sensor, and permits improved correlation. The reduction in storage bits permits a reduction in chip size. Differences in sensitivities of right and left sensor arrays are not corrected independently. Instead, the two sets of corrective data enhance the similarity between counted value rows from the right and left sensor arrays.

Method for correlating image data of a range-finder

For correction of an error caused in a period of a clock signal for digitizing a plurality of time signals, e.g., from an image sensor, a clock signal generating device generates a reference signal Sr indicative of a reference time of time signals TS from an OR-date (20). The device counts a reference clock signal .phi. in a frequency divider (30) until the reference signal Sr is generated, and outputs a divided clock signal .phi..sub.n with frequency dividing ratio 1/N from the frequency divider (30). It then counts the signal .phi..sub.n and stores the count value as a reference value S in a reference value counter (40). The device outputs an output clock signal .phi..sub.o from an output counter (50) each time the signal .phi. received after generation of the signal Sr reaches a predetermined value. It accumulates in an accumulator (60) the count value of the frequency divider (30) at the time of generation of the signal Sr in response to the signal .phi..sub.o, and it sets a reference value of the counter (50) for counting the signal .phi., to generate the signal .phi..sub.o usually at S, and at 1+S when an accumulated value in the accumulator (60) reaches the parameter N of the frequency dividing ratio.

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Nagano, Japan

Kenichi Mori