Mitsumi Electric Company Ltd.

Kenichi Miki

Yukihiro Terada

Yuji Yamanaka

Yoshitaka Onishi

A plurality of IC chips each having an internal circuit are mounted on a wafer substrate. A plurality of scribe lines are formed on the wafer substrate for separating the IC chips from one another. A plurality of inspection pads are formed on the scribe lines. Each of the inspection pads is connected to the associated internal circuit via a conduction path for inspecting an operation of the associated IC chip.

Semiconductor wafer

An overcharge protection circuit includes an overcharge detection section for detecting whether or not a secondary battery is put into an overcharge condition, and for producing an overcharge detected signal on detection of the overcharge condition. An overcharge blind time setting circuit produces, in response to the overcharge detected signal, an OFF control signal for turning a charge control switch off after a lapse of a predetermined overcharge detection blind time interval defined by a capacitance value of a capacitor. An excessive current detection resistor detects whether or not the charging current is an excessive current. When the excessive current is detected by the excessive current detection resistor, a forcibly discharged arrangement forcibly and immediately discharges electrical charges accumulated in the capacitor, thereby immediately turning the charge control switch off upon detection of the excessive current without waiting for the lapse of the predetermined overcharge detection blind time interval.

Overcharge protection circuit capable of preventing damage to a charge control switch on flowing an excessive current

A secondary battery protection circuit detects at least one of an over-discharge state, an over-charge state, and an over-current state of a secondary battery and performs an operation in accordance with the detected state. The secondary battery protection circuit comprises a blind time setting circuit constituted by an IC for setting a blind time in accordance with the detected state. The blind time setting circuit has a switching circuit for setting a blind time for a functional test that is shorter than a preset blind time.

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Kanagawa, Japan

Kenichi Miki