Sharp Kabushiki Kaisha Corporation

Other

Semiconductor Energy Laboratory Co., Ltd.

Kenichi Katoh

Yasushi Kubota

Hiroshi Yoneda

Jun Koyama

Hidehiko Chimura

Yutaka Ishii

Tamotsu Sakai

Ichiro Shiraki

Yukio Tanaka

Kazuhiko Tsuda

Shigeto Yoshida

Yasukuni Yamane

Katsuya Mizukata

Satoru Kishimoto

Osamu Sasaki

Disclosed is a portable information apparatus, which is provided with a display section capable of displaying a color display and a dynamic display in a high image quality, and which consumes less electricity. When the portable information apparatus of a folder type is in a folded state, a display screenis composed of an image display region and a non-image region, so that at least a part of the image display region can be seen via a transparent section

Portable information apparatus for displaying information in a folded state

An active matrix display device has a number of pixels arranged in matrix form, signal lines for supplying display signals to the pixels, and a driver circuit for driving the signal lines. The driver circuit includes a frequency divider circuit for frequency-dividing input multi-phase clock signals, a synchronous counter circuit for frequency-dividing part of the input multi-phase clock signals, and a decoder circuit for selecting a desired one of the signal lines based on outputs of the frequency divider circuit and the synchronous counter circuit.

Active matrix display device and scanning circuit

There is disclosed an active matrix liquid crystal display that receives input signals having small amplitudes and needs no externally attached level-shifting circuit. The active matrix liquid crystal display has a level-shifting circuit for amplifying various input signals, such as control signals, a clock signal, and a start pulse signal, and supplying the amplified signals to peripheral driver circuits. These peripheral driver circuits drive an active matrix circuit. The level-shifting circuit is made of a differential amplifier consisting of polysilicon TFTs. This amplifier is an analog amplifier. This level-shifting circuit is fabricated on the same substrate as the active matrix circuit and the peripheral driver circuits. If the amplitudes of the input signals are small, level-shifting operations can be performed well. Since any externally attached level-shifting circuit is dispensed with, the cost can be curtailed.

Display device

In a field-effect transistor, one of the distance between a gate electrode and a source electrode and the distance between the gate electrode and a drain electrode which one distance is on a side where a signal of a high frequency is applied is made longer than the other distance on a side where a signal of a low frequency is applied.

TFT CMOS logic circuit having source/drain electrodes of differing spacing from the gate electrode for decreasing wiring capacitance and power consumption

An active-matrix image display device which includes n shift registers, analog switches for sampling video input signals and a data-signal-line driving circuit to which n series of clock signals and n.times.m series of video input signals are input, and controls the analog switches according to the result of a logic operation of output pulses from successive l stages in the shift registers. A scanning circuit without using shift registers. Here, n is an integer not smaller than one, m and l are integers not smaller than two. With the image display device, sampling of video signals is surely executed without increasing the number of shift registers. It is thus possible to reduce the size and weight of the image display device and to decrease the defect rate thereof. Moreover, the scanning circuit achieves a higher yield compared with a conventional scanning circuit using a shift register.

Image display scanning circuit with outputs from sequentially switched

An image display device includes an operational amplifier, a signal amplifier provided with a condenser for setting a gain of the operational amplifier, a signal amplifier circuit having such signal amplifier or a buffer amplifier, the signal amplifier circuit being provided with an offset adjusting function, and a data signal line drive circuit having a signal amplifier or a signal line drive circuit. The described arrangement enables the gain of the signal amplifier to be set by a capacitance of the condenser, thereby providing a signal amplifier circuit which permits the gain to be set much more precisely as compared to the conventional signal amplifier circuits even when adopting a signal amplifier formed on a semiconductor thin film such as a polycrystalline silicone thin film. The arrangement also provides a signal amplifier circuit which permits a voltage in the same level as a voltage of the input signal to be outputted. Furthermore, the arrangement provides high quality data signal line drive circuit and the image display device.

Signal amplifier, signal amplifier circuit, signal line drive circuit

A scanning circuit for a display device having an array of pixels. One embodiment of the scanning circuit includes L scan control signal lines, first logic circuits to operate on signals from M of the L scan control signal lines, flip-flop circuits communicating with the first logic circuits, N timing control signal lines, and second logic circuits coupled to operate on signal from the N timing control signal lines and the flip-flop circuits.

The shift register of this invention for sequentially transferring a digital signal in synchronization with a clock signal includes: a plurality of circuit blocks connected in series, each including a prescribed number of sequential latch circuits, each latch circuit outputting a signal corresponding to an input signal based on the clock signal; and a plurality of clock signal control circuits provided for the respective circuit blocks for controlling the supply of the clock signal to the latch circuits in the corresponding circuit blocks, wherein the control of the supply of the clock signal by each clock signal control circuit to the latch circuits in the corresponding circuit block is conducted in response to output signals from prescribed latch circuits in the circuit blocks preceding and subsequent to the corresponding circuit block.

Shift register having a plurality of circuit blocks and image display

A data signal output circuit is divided into a plurality of blocks, each having its own supply circuit. In each block, a plurality of shift register sections, constituting a shift register, output pulse signals which have been shifted according to clock signals. Driving sections sample a digital image signal in synchronism with the pulse signal, and output data signals corresponding to the image signal thus sampled to a plurality of output lines. Each supply circuit provided in the blocks receives the image signal when the image signal should be sampled by the driving sections, thereby supplying the image signal only to the minimum number of blocks to be operated. In this manner, the image signal is selectively supplied to the block so as to reduce the effective load on the image signal. As a result, the power consumption generated in the image signal lines can be reduced.

Data signal output circuit for an image display device

An active matrix type image display apparatus which includes: a plurality of data signal lines; a plurality of scanning signal lines crossing the plurality of data signal lines; and a plurality of pixel portions disposed in a matrix in areas enclosed by the plurality of data signal lines and the plurality of scanning signal lines, wherein each of the plurality of pixel portions includes: a pixel capacitor for storing electric charge supplied from at least one of the plurality of data signal lines, to display an image; storage unit connected to the pixel capacitor; and switching unit which alternately selects one of an operation for electrically connecting the pixel capacitor to the storage unit and an operation for electrically disconnecting the pixel capacitor from the storage unit.

Image display apparatus

A driving circuit in a matrix type image display apparatus including a plurality of groups each including four standard unit circuits and one backup unit circuit. Each standard unit circuit includes disconnecting means for isolating the standard unit circuit from the driving circuit, and the backup unit circuit includes connecting means for connecting the backup unit circuit to an input signal line and an output signal line of any of the standard unit circuits within a group. The number of the backup unit circuits can be changed in accordance with a conforming ratio of each unit circuit, which makes it possible to eliminate idle backup unit circuits while maintaining a high overall conforming ratio of the driving circuit, thereby enhancing manufacturing efficiencies and reducing manufacturing costs.

Matrix type image display using backup circuitry

A matrix-type display device in which a number of pixels are arranged and a scanning line and a signal line to which a display signal is output are connected to each pixel. A signal line driver circuit in which a decoder circuit is controlled by a counter circuit, or a scanning line driver circuit in which a decoder circuit is controlled by a counter circuit is divided into a plurality of sections. A clock signal and/or a power supply voltage is selectively supplied to the respective sections.

Matrix-type display device

A scanning circuit is provided with a plurality of address lines and AND circuits. The address lines respectively supply bit signals constituting an address signal and inverted bit signals, and each AND circuit conducts a logical operation on a predetermined number of bit signals and inverted bit signals selected from the bit signals and inverted bit signals supplied from the address lines. The AND circuits are connected to the address lines so that only one bit is switched when the address signal carries. Furthermore, a frequency of the least significant bit of the address signal is set to 1/4 of the dot frequency, while the two bits at the high end are set to have the same frequency and a phase difference of 90.degree. each other. With the described arrangement, a phase shift is prevented from occurring to an outputted signal when the address signal carries. Furthermore, the arrangement ensures that the scanning circuit can be realized in a simple circuit arrangement and operates at low frequencies, thereby ensuring a decrease in power consumption.

Scanning circuit and image display apparatus

A matrix display apparatus includes a matrix of pixels divided into a plurality of groups of pixels and data signal lines for delivering a data signal to a pixel. The data signal lines are distributed along the direction of a column. The apparatus also includes scanning signal lines for applying a scanning signal to a pixel, the scanning signal lines being distributed along the direction of a row. The apparatus also includes a first switch, disposed from each of the plurality of pixels, for allowing the data signal to be applied to the corresponding pixel based on the scanning signal. The apparatus also includes a second switch, disposed for each of the pixels in at least one of the plurality of the pixel groups, for controlling a timing for allowing the data signal to be applied to the corresponding pixel. The second switch is connected in series to the first switch between the first switch and the data signal line. The apparatus further includes a data signal line driver for sampling an image signal for each of the plurality of scanning signal lines at a predetermined timing within a horizontal scanning period for the corresponding data signal line and for outputting the sampled image signal to the corresponding data signal line as the data signal, the data signal being applied to at least one of the plurality of the pixel groups for a horizontal scanning period and a portion of an adjacent horizontal scanning period.

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Tenri, Japan

Kenichi Katoh