Kabushiki Kaisha Toshiba

Kenichi Kadota

Hiroshi Matsushita

Tomonobu Noda

Hiroyuki Hayashi

Takamitsu Nagai

Yoshiyuki Shioyama

Toshiyuki Aritake

Hisaki Kozaki

Yukihiro Ushiku

Junji Sugamoto

Kenji Kawabata

A method for inputting a foreign substance inspection map created by foreign substance inspection for a wafer surface after each processing process in a wafer processing process, inputting a die sort map created by a die sort test after the wafer processing process, setting region segments in the wafer, setting a region number for each segment, calculating foreign substance density of the region segments, based on the foreign substance inspection map, and plotting the foreign substance density, using the region numbers, to calculate a foreign substance inspection map waveform characteristic amount, calculating failure density in the region segments, based on the die sort map, and plotting the failure density, using the region numbers, to calculate a die sort map waveform characteristic amount, calculating similarity between the foreign substance inspection map waveform characteristic amount and the die sort map waveform characteristic amount, and identifying a processing process cause of failure occurrence.

Failure detecting method, failure detecting apparatus, and semiconductor device manufacturing method

The present invention provides a linear pattern detection method which can extract and detect linear patterns distinguished by a microscopic defect distribution profile even if skipped measurements are taken. The linear pattern detection method acquires a defect map created based on results of defect inspection of a wafer; divides the defect map into a plurality of first segments; calculates a correlation coefficient of a point sequence in each of the first segments, the point sequence corresponding to a defect group contained in the first segments; calculates a total number of those first segments in which the correlation coefficient is equal to or larger than a first threshold; and determines that the wafer contains a linear pattern if the total number is equal to or larger than a second threshold.

Linear pattern detection method and apparatus

A semiconductor substrate inspection method includes: generating a charged particle beam, and irradiating the charged particle beam to a semiconductor substrate in which contact wiring lines are formed on a surface thereof, the contact wiring lines of the semiconductor substrate being designed to alternately repeat in a plane view so that one of the adjacent contact wiring lines is grounded to the semiconductor substrate and the other of the adjacent contact wiring lines is insulated from the semiconductor substrate; detecting at least one of a secondary charged particle, a reflected charged particle and a back scattering charged particle generated from the surface of the semiconductor substrate to acquire a signal; generating an inspection image with the signal, the inspection image showing a state of the surface of the semiconductor substrate; and judging whether the semiconductor substrate is good or bad from a difference of brightness in the inspection image obtained from the surfaces of the adjacent contact wiring lines.

Semiconductor substrate, substrate inspection method, semiconductor device manufacturing method, and inspection apparatus

A failure analysis method according to the invention includes inputting the positions of failures in multiple wafers of an input device; preparing multiple sections in the multiple wafers; calculating feature amounts, which are represented by at least one numerical value representing a distribution of the failures in the multiple wafers, for each of the multiple sections; and representing by a first numerical value, the degree of similarity between the multiple wafers in terms of the feature amounts. Subsequently, the method includes detecting another wafer, which has the first numerical value greater than a predetermined first threshold, for each of the multiple wafers and forming a similar wafer group of multiple wafers with similar distributions of the failures.

Method for analyzing fail bit maps of waters and apparatus therefor

A control system for a manufacturing apparatus includes manufacturing information input unit acquiring time series data of apparatus parameters controlling manufacturing apparatuses; failure pattern classification module classifying in-plane distributions of failures of each of the wafers into failure patterns; an index calculation unit configured to statistically process the time series data by algorithms to calculate indices corresponding to the respective algorithms; an index analysis unit providing first and second frequency distributions of the indices categorized with and without the target failure pattern, to implement significance test between the first and second frequency distributions; and an abnormal parameter extraction unit extracting failure cause index of failure pattern by comparing value of the significance test with test reference value.

System and method for monitoring manufacturing apparatuses

A system for identifying a manufacturing tool causing a failure, includes a data generating module generating factorial effect data, based on information on a failure lot group by using an orthogonal array, a chart generating module generating a factorial effect chart based on the factorial effect data, a selection module selecting failure lots caused by the same reason for a failure from among the failure lot group, based on the factorial effect chart, and an identification module identifying a manufacturing tool used as a common tool for the selected plurality of failure lots, based on history information of the manufacturing tool group.

System and method for identifying a manufacturing tool causing a fault

A method of detecting a wafer failure includes extracting the wafer ID of a target wafer in the target lot from the lot ID, extracting the location information of a failure in the target wafer, calculating a to-be-quantified first wafer feature amount for unevenness of a wafer failure distribution, calculating a first lot feature amount for each target lot, extracting a fabrication process for the target lot and a fabrication apparatus, carrying out a significant test for the fabrication apparatus used in each fabrication process, and detecting the fabrication apparatus with a significant difference as a first abnormal apparatus.

Method for analyzing fail bit maps of wafers

A method of detecting failure of manufacturing apparatuses has: identifying a low-yield-period apparatus having a significantly lower yield period compared with other manufacturing apparatus and the significantly lower yield period by comparing yields of a plurality of manufacturing apparatuses used in parallel in a specific manufacturing process for each time period when the manufacturing apparatuses were used; identifying a downward-tendency apparatus having a significant downward tendency in yield compared with the other manufacturing apparatus by comparing recent yield trends of the plurality of manufacturing apparatuses; and issuing multi-level warnings to the low-yield-period apparatus and the downward-tendency apparatus.

System for, method of and computer program product for detecting failure of manufacturing apparatuses

A failure detection system includes a wafer test information input unit which acquires pass/fail maps for wafers for a plurality of types of semiconductor devices, displaying failure chip areas based on results of electrical tests performed on chips; an analogous test information input unit which classifies the electrical tests into analogous electrical tests with regard to analogous failures among the semiconductor devices; a subarea setting unit which assigns subareas common to the types of semiconductor devices on a wafer surface; a characteristic quantity calculation unit which statistically calculates characteristic quantities based on a number of the failure chip areas included in the subareas for each analogous electrical test; and a categorization unit which obtains correlation coefficients between the characteristic quantities corresponding to the subareas, and classifies clustering failure patterns of the failure chip areas into categories by comparing the correlation coefficients with a threshold.

Failure detection system, failure detection method, and computer program product

An analysis method for a semiconductor device includes measuring electrical characteristics of TEGs fabricated on a semiconductor substrate; classifying the TEGs into a first TEG category where a systematic failure has not occurred and a second TEG category where the systematic failure has occurred based on the electrical characteristics; creating a first comparison Mahalanobis reference space using first parameters of the TEGs in the first TEG category from among parameters of the TEGs expressed as numerical values; calculating a first comparison Mahalanobis distance of the first parameters and a second comparison Mahalanobis distance of second parameters of the TEGs in the second TEG category by using the first comparison Mahalanobis reference space; and comparing the first and second comparison Mahalanobis distances.

Growing community of inventors

Yokohama, Japan

Kenichi Kadota