Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kioxia Corporation

Fujitsu Corporation

Nissan Motor Company Limited

The Furukawa Electric Co., Ltd.

Nsk Corporation

Furukawa Automotive Systems Inc.

Union Machinery Co., Ltd.

Kenichi Abe

Takuya Futatsuyama

Masanobu Shirakawa

Atsuhiro Sato

Toshifumi Minami

Yasuyuki Baba

Keisuke Yonehama

Hiroshi Shinohara

Hiroshi Nakamura

Norihisa Naganuma

Hisashi Takamatsu

Hidehiro Shiga

Jumpei Sato

Shinji Yamaguchi

Yoshitaka Hayashi

Mizuho Yoshida

Tetsu Hirose

Kinji Yukawa

Kiyotaka Shikata

Kazuhiro Uchida

Yukihiro Hamada

Masaharu Matsumoto

Katsuhiko Hirashima

Susumu Tominaga

Tomoharu Saito

Takanori Tanaka

Takamitsu Shirai

Hiroki Maejima

Akira Ishimaru

Takaaki Shiratani

Yuichi Igarashi

Shigeharu Murakami

Yasushi Tanoue

Masamoto Ono

Miho Kawai

A semiconductor memory device includes a first memory cell, a second memory cell above the first memory cell, a first word line electrically connected to a gate of the first memory cell, a second word line electrically connected to a gate of the second memory cell, and a control unit that performs an erasing operation on the first and second memory cells. During the erasing operation, the control unit applies a first voltage to a first word line and a second voltage higher than the first voltage to a second word line.

Semiconductor memory device

A memory device includes a semiconductor column extending above a substrate, a first conductive layer on a first side of the semiconductor column, a second conductive layer on a second side of the semiconductor column, opposite to the first conductive layer, a third conductive layer above or below the first conductive layer and on the first side of the semiconductor column, a fourth conductive layer on the second side of the semiconductor column, opposite to the third conductive layer, and a bit line connected to the semiconductor column. During reading in which a positive voltage is applied to the bit line, first, second, third, and fourth voltages applied to the first, second, third, and fourth conductive layers, respectively, wherein the first voltage and the third voltage are higher than each of the second voltage and the fourth voltage, and the third voltage is higher than the first voltage.

Memory device

A vehicle body lower structure includes a side sill, a center tunnel, a floor panel disposed between the side sill and the center tunnel, a first frame member connected to a front side member, and a second frame member connected to the front side member. The first frame member extends obliquely such that, as the first frame member extends further rearward, the first frame member extends further outward in a vehicle width direction. The second frame member is connected to the side sill. The second frame member extends obliquely such that, as the second frame member extends further rearward, the second frame member extends further inward in the vehicle width direction. The second frame member is connected to the center tunnel. One of the first frame member and the second frame member is provided on an upper surface of the floor panel.

Vehicle body lower structure

A semiconductor memory device includes first to third pages, first to the third word lines, and a row decoder. In data writing, data is written into the first page before data is written into the second page. The row decoder is configured to apply first to third verify voltages to gates of first to third memory cells in a program verify operation.

According to one embodiment, a semiconductor memory device includes first and second memory cells, a word line, and first and second bit lines. The first and second bit lines are electrically connected to one ends of the first and second memory cells, respectively. In retry reading, a voltage applied to the first bit line is different from a voltage applied to the second bit line.

Semiconductor memory device and memory system

A semiconductor memory device includes: a memory cell array including memory strings, one of the memory strings including memory cells; word lines commonly connected to the memory strings; and a controller configured to execute a write operation and a read operation on a page, the page being stored in memory cells connected to one of the word lines. The controller is configured to measure a cell current flowing in the memory string, and adjust a write voltage applied to a word line, based on a result of the cell current.

Growing community of inventors

Yokohama Kanagawa, Japan

Kenichi Abe