Hitachi, Ltd.

Fujifilm Healthcare Corporation

Renesas Technology Corp.

Hitachi-high-technologies Corporation

Kengo Imagawa

Yutaka Igarashi

Norio Chujo

Masami Makuuchi

Shinya Kajiyama

Ritsuro Orihashi

Yoshitomo Arai

Yoshihiro Hayashi

Masayoshi Takahashi

Yusaku Katsube

Yohei Nakamura

Takuma Nishimoto

Toru Yazaki

Kazuhiro Amino

Takayuki Iwashita

Takahiro Jingu

Shuntaro Machida

Wen Zheng Li

Hiroaki Hasegawa

Taiichi Takezaki

Ritsurou Orihashi

Yoshiharu Umemura

Yoshiharu Ikeda

Koichiro Eguchi

Atsushi Obuchi

Kaoru Arita

Masahiro Imanari

An ultrasonic probe including: a plurality of transducers; a plurality of low-noise amplifier circuits individually corresponding to the plurality of transducers, the plurality of low-noise amplifier circuits having a variable resistor feedback unit making a resistance value variable by an electrical signal inputted to a control terminal; and a control circuit; wherein the control circuit has a dummy circuit generating a bias voltage of a feedback unit of the low-noise amplifier circuit, and an adding circuit outputting an added signal of a bias voltage by the dummy circuit and a control signal increasing or decreasing with a lapse of time; and the plurality of low-noise amplifier circuits input an output of the adding circuit to the control terminal of the variable resistor feedback unit to perform variable control on a gain of the low-noise amplifier circuit.

Ultrasonic probe and ultrasonic diagnostic apparatus using thereon

To provide a probe including a TGC circuit therein. The probe includes a plurality of receive circuits. Each receive circuit includes: an ultrasound transducer; a transmit/receive switch; a variable attenuator; a first capacitor; and an amplifier. The ultrasound transducer converts the receive signal into a ground level electric signal and outputs the ground level electric signal as a first output signal. The transmit/receive switch is connected to a first signal line, and switches depending on whether to output the first output signal output from the ultrasound transducer to the first signal line. The variable attenuator includes a control terminal and two terminals, and changes a resistance value between the two terminals other than the control terminal based on a control signal input to the control terminal. The amplifier has an input terminal connected to the first capacitor and includes at least an amplifier circuit configured to amplify an electric signal of the first signal line and output the amplified electric signal to a second signal line. In the variable attenuator, one of the two terminals other than the control terminal is connected to the first signal line, and the other terminal is connected to the ground via a second capacitor different from the first capacitor.

Probe and ultrasound diagnostic device using the same

A switch circuit connected to a transducer, a reception circuit connected to the switch circuit, a first switch element connected to a reception terminal provided between the switch circuit and the reception circuit, a first resistance element connected to a control terminal of the switch circuit, a second resistance element provided inside the reception circuit, and a second switch element provided inside the reception circuit are provided.

Ultrasonic probe, ultrasonic diagnostic apparatus, and ultrasonic transmission/reception switching method

Provided is a probe which transmits an ultrasonic wave to a diagnostic site and receives a reception signal which is a reflected wave. The probe includes: a plurality of transducers; a plurality of low-noise amplifying circuits respectively corresponding to the plurality of transducers; and a single differential converter which converts a control signal rising with the elapse of time to a first bias signal rising with the elapse of time and a second bias signal falling with the elapse of time to control the plurality of low-noise amplifying circuits, and the low-noise amplifying circuit includes: an attenuator which attenuates an electric signal from the transducer; a first amplifying circuit which sets the first bias signal as a bias and amplifies an output signal of the attenuator to be gradually increased with the elapse of time; a second amplifying circuit which sets the second bias signal as a bias and amplifies the output signal of the attenuator to be gradually reduced with the elapse of time; and a subtractor which subtracts an output of the first amplifying circuit and an output of the second amplifying circuit.

Ultrasonic diagnostic apparatus and probe used for the same

Capacitors, each of which is electrically connected to a capacitor which is the cell of the CMUT mounted in a chip and is used as a DC block capacitor for protecting an amplifying circuit, are formed as many as plural aligned channels in the chip. The capacitor is an electrostatic capacitance element which is not vibrated acoustically.

Ultrasonic transducer array and ultrasonic probe

Provided is a probe which transmits an ultrasonic wave to a diagnostic site and receives a reception signal which is a reflected wave. The probe includes: a plurality of transducers; a plurality of low-noise amplifying circuits respectively corresponding to the plurality of transducers; and a single differential converter which converts a control signal rising with the elapse of time to a first bias signal rising with the elapse of time and a second bias signal falling with the elapse of time to control the plurality of low-noise amplifying circuits, and the low-noise amplifying circuit includes an attenuator which attenuates: an electric signal from the transducer; a first amplifying circuit which sets the first bias signal as a bias and amplifies an output signal of the attenuator to be gradually increased with the elapse of time; a second amplifying circuit which sets the second bias signal as a bias and amplifies the output signal of the attenuator to be gradually reduced with the elapse of time; and a subtractor which subtracts an output of the first amplifying circuit and an output of the second amplifying circuit.

Provided are an ultrasound probe, an element circuit thereof, and an ultrasound diagnostic device, whereby high image quality is possible and reduced size and lower cost are made possible. Provided is an ultrasound probe, comprising: a 2-D array transducer wherein a plurality of transducers are arrayed two-dimensionally; and a 2-D array IC in which are formed, upon an IC substrate, drive circuits which are disposed upon each of the transducers of the 2-D array transducer to drive each of the transducers at different timings with a prescribed delay quantity, and common current sources which supply drive current to the transducers of the 2-D array transducer. The number n of the common current sources which are formed upon the IC substrate is fewer than the number N of the drive circuits which are formed upon the IC substrate.

Ultrasound probe, element circuit thereof, and ultrasound diagnostic device using same

An objective of the present invention is to provide an ultrasound system which can correct a positive-negative asymmetry in pulse inversion (PI) and obtain a high-image quality ultrasound image. To carryout an asymmetry correction of a transmission assembly circuit comprising an oscillation adjustment amplifier () and an ultrasound oscillator array (), correction data obtained in a calibration mode is stored in a correction memory (), and positive-negative asymmetry of an overall receiving assembly circuit comprising a computation unit () is corrected in a diagnostic mode of the device using the correction data.

Ultrasound system and method, and ultrasound probe

Amplification of a signal by a small circuit size and reduction of a power are achieved. A current controlling current source unitchanges an outputting current based on a transition time setting signal tp. A current controlling current source unitchanges a drawing current based on a transition time setting signal tn. An amplitude control unitchanges a power source voltage supplied to the current controlling current source unitand changes amplitude of a voltage generated by a current outputted from the current controlling current source unit, based on amplitude setting signal ap. An amplitude control unitchanges a power source voltage supplied to the current controlling current source unitand changes amplitude of a voltage generated by the current drawn by the current controlling current source unit, based on amplitude setting signal an. The buffer unitdrives a load in accordance with the current outputted from the current controlling current source unitand the current drawn from the current controlling current source unit

Amplifier circuit and ultrasonic probe

The detection part has: a subtraction module for calculating correction data from data of detection systems when a reference-voltage generation module applies a reference voltage to the detection systems; a data-holding module for holding the correction data; an addition module for making a correction of detection data; a comparison module for comparing the detection data with switching data; and a selector for switching data of the detection systems including data subjected to the correction according to the output of the comparison module.

Contamination-inspecting apparatus and detection circuit

The present invention provides a ramp generator capable of appropriately setting a rise starting point of an output voltage of a ramp waveform and an output voltage at the time of stable output. A current adjustment unit including a differential pair of transistors and an amplifier constitute a feedback circuit. By controlling the charging/discharging of an integration capacitor by ON/OFF of a discharge current source connected to a common emitter terminal of the current adjustment unit, an output of the ramp waveform outputted from an output terminal disposed at the connection end of the integration capacitor is controlled.

Ramp generator and circuit pattern inspection apparatus using the same ramp generator

In order to easily perform a timing test on a memory interface included in a semiconductor device so as to satisfy a restriction on latency, the present invention provides a semiconductor device with the memory interface including: a clock output terminal that outputs a clock signal associated with an operation of a memory connected to the memory interface; a command terminal that outputs a command signal associated with control of a state of the memory; a data terminal that exchanges a data signal with the memory; and a data strobe terminal that exchanges a data strobe signal for establishing the data signal. This semiconductor device includes a testing terminal that outputs in advance a signal for starting a test on the memory interface apart from the command signal.

Semiconductor device, testing and manufacturing methods thereof

A semiconductor device according to the present invention has a liquid crystal driver circuit, and when gray-scale voltage thereof is tested, the gray-scale voltage (Vx) generated in a gray-scale voltage generator circuit provided therein is compared with reference voltage (e.g., Vx+&#x394;V) generated for testing the gray-scale voltage and the test result is output as binarized voltage from external terminals of the semiconductor device. This can speed up the gray-scale voltage test even in the case of higher gray scale in the liquid crystal driver circuit or increased number of output terminals of the semiconductor device. Therefore, it becomes possible to reduce the time and cost required for the test.

Semiconductor device and testing method thereof

A problem, which one of the inventions included in the present application solves, is to provide a semiconductor device that can simultaneously test a plurality of output pins by less channels of a semiconductor test equipment in number than the integrated output pins of the semiconductor device. Representative one of the inventions has such a configuration that an LCD driver, which is the semiconductor device having a function of driving a gate line of a liquid crystal display panel, comprises: an exclusive-OR circuit for inverting polarities of positive and negative voltages for driving the gate line; a tri-state type inverter circuit capable of changing and controlling, to a high-impedance state, an output circuit for driving the gate line; and at least one of test control terminals TEST for controlling the exclusive-OR circuit and the tri-state type inverter circuit. When a test is conducted, only one terminal of the gate output outputs a positive voltage VGH or negative voltage VGL and the other terminal is set to a high-impedance state, whereby the plurality of gate outputs are simultaneously tested.

Semiconductor device and the method of testing the same

A semiconductor device having a liquid crystal driving circuit is disclosed. The driving circuit includes a digital functional unit and an analog functional unit. The digital functional unit is comprised of a display controller and a display data storage RAM, while the analog functional unit is made up of a gradation voltage generating circuit and a gradation voltage selecting circuit. The digital and analog function units are functionally divided from each other and testing of the digital function and testing of the analog function unit are performed in an overlapping manner independently from each other.

Growing community of inventors

Tokyo, Japan

Kengo Imagawa