Samsung Electronics Co., Ltd.

Ken Tokashiki

Sangmin Lee

Jaehun Seo

Jongchul Park

Sechung Oh

Vladimir Urazaev

Hyungjoon Kwon

Gwang-Hyun Baek

Hong Seok Cho

Yong-jin Kim

Jeong-Dong Choe

Woo-Jin Kim

Kyoung-Sub Shin

Jeong-yun Lee

Keun-Hee Bai

Kyoung-Sun Kim

Jun-ho Yoon

Yoon-Jae Kim

Yoonchul Cho

Provided are semiconductor devices and methods of fabricating the same. The semiconductor device may include lower wires, upper wires crossing the lower wires, select elements provided at intersections between the lower and upper wires, and memory elements provided between the select elements and the upper wires. Each of the memory elements may include a lower electrode having a top width greater than a bottom width, and a data storage layer including a plurality of magnetic layers stacked on a top surface of the lower electrode and having a rounded edge.

Semiconductor devices and methods of fabricating the same

In a method of manufacturing a MRAM device, a lower electrode is formed on a substrate. A first magnetic layer, a tunnel barrier layer, and a second magnetic layer are sequentially formed on the lower electrode layer. An etching mask is formed on the second magnetic layer. An ion beam etching process in which a first ion beam and a second ion beam are simultaneously emitted onto the substrate is performed to form a MTJ structure including a first magnetic layer pattern, a tunnel layer pattern, and a second magnetic layer pattern from the first magnetic layer, the tunnel barrier layer, and the second magnetic layer, respectively, the MTJ structure has no by-products remaining after the ion beam etching process is performed.

Methods of manufacturing a magnetoresistive random access memory device

Magnetic memory devices and methods of manufacturing the same are disclosed. A method may include forming a magnetic tunnel junction layer on a substrate, forming mask patterns on the magnetic tunnel junction layer, and sequentially performing a plurality of ion implantation processes using the mask patterns as ion implantation masks to form an isolation region in the magnetic tunnel junction layer. The isolation region may thereby define magnetic tunnel junction parts that are disposed under corresponding ones of the mask patterns. A magnetic memory device may include a plurality of magnetic tunnel junction parts electrically and magnetically isolated from each other through the isolation region.

Magnetic memory device and method of manufacturing the same

Provided is a method of forming a magnetic memory device. A first magnetic layer, a tunnel barrier, and a second magnetic layer are deposited on a substrate. The second magnetic layer, the tunnel barrier, and the first magnetic layer are etched to form magnetic tunnel junction structures. An ion beam etching process is performed using an oxygen-containing source gas to remove etching by-products on sidewalls of the magnetic tunnel junction structure and to oxidize the sidewalls of the magnetic tunnel junction structures.

Method of forming magnetic memory devices

Provided is a device for analyzing at least one of a generated amount of positive charges, a generated amount of negative charges, and a generated amount of ultraviolet (UV) light. The device includes a substrate on which at least one of a first device configured to detect a variation in threshold voltage relative to the generated amount of positive charges, a second device configured to detect a variation in threshold voltage relative to the generated amount of negative charges, and a third device configured to detect a variation in threshold voltage relative to the generated amount of UV light is formed. Each of the first through third devices includes a first isolation region disposed in the substrate which define first and third active regions each of a first conductivity type and second and fourth active regions each of a second conductivity type different from the first conductivity type, first impurity regions disposed in the first active region and spaced apart from each other and having the second conductivity type, a floating gate crossing over the first active region between the first impurity regions and extending over the second active region, a second impurity region disposed in the second active region and having the first conductivity type, and a conductive structure electrically connected to the second impurity region.

Device for analyzing charge and ultraviolet (UV) light

Synchronous pulse plasma etching equipment includes a first electrode and one or more second electrodes configured to generate plasma in a plasma etching chamber. A first radio frequency power output unit is configured to apply a first radio frequency power having a first frequency and a first duty ratio to the first electrode, and to output a control signal including information about a phase of the first radio frequency power. At least one second radio frequency power output unit is configured to apply a second radio frequency power having a second frequency and a second duty ratio to a corresponding second electrode among the second electrodes. The second radio frequency power output unit is configured to control the second radio frequency power to be synchronized with the first radio frequency power or to have a phase difference from the first radio frequency power in response to the control signal.

Synchronous pulse plasma etching equipment and method of fabricating a semiconductor device

A method of processing a substrate using plasma includes loading a substrate into a chamber, processing the substrate with a first plasma mode and then processing the substrate with a second plasma mode, wherein at least one of the first plasma mode and the second plasma mode is a time-modulation mode in which a plasma induced in the chamber is periodically turned on and off to reduce plasma-induced damage in the substrate.

Method of processing a substrate

Provided are a method of fabricating a semiconductor device and synchronous pulse plasma etching equipment for the same. The method includes outputting a first radio frequency (RF) power and a control signal and outputting a second RF power. The first RF power is pulse-width modulated to have a first frequency and a first duty ratio, and is applied to a first electrode in a plasma etching chamber. The control signal includes information on a phase of the first RF power. The second RF power is pulse-width modulated to have the first frequency and a second duty ratio smaller than the first duty ratio, is applied to a corresponding second electrode among second electrodes in the plasma etching chamber, and is supplied for a time section in which the first RF power is supplied.

Growing community of inventors

Seongnam-si, South Korea

Ken Tokashiki