Renesas Electronics Corporation

Hitachi Device Engineering Co., Ltd.

Hitachi, Ltd.

Renesas Technology Corp.

Other

Mitsubishi Electric Corporation

Ken Shibata

Masashi Horiguchi

Yasuhisa Shimazaki

Hiroki Miyashita

Kiyotada Funane

Binhaku Taruishi

Makoto Yabuuchi

Noriaki Maeda

Toshiaki Sano

Shinji Tanaka

Yuta Yanagitani

Kouki Hagiya

Kanji Oishi

Tetsuo Komura

Hiromi Goda

Kentaro Hoshino

Hiroshi Jota

A RIO device mounted to a train includes an output unit that outputs a signal to a relay mounted to the train, and a controller that controls whether or not to cause the output unit to output the signal. The output unit includes a readback circuit that detects whether or not the signal is outputted from the output unit. The controller makes a signal stop request and a signal output request to the output unit before operation of the train starts, acquires a detection result of the readback circuit while each of the signal stop request and the signal output request is performed, and detects abnormality of the output unit using the detection result.

Signal control device and abnormality detection method

A semiconductor device enabling expansion of a noise margin. For example, in a memory area in which each memory cell MC is coupled to a word line WLA for a first port and a word line WLB for a second port, and a plurality of memory cells MC are disposed in a matrix shape, each word line is disposed in the order of WLA, WLB, WLB, WLA, WLA. Further, a pitch dbetween WLA-WLA and between WLB-WLB is made smaller than a pitch dbetween WLA-WLB. As such, the word lines of an identical port are disposed at the pitch don one of both sides of a certain word line and the word lines of different ports are disposed at the pitch don the other.

Semiconductor device having multiport memory

A semiconductor storage device provided can increase a write margin and suppress increase of a chip area. The semiconductor storage device includes plural memory cells arranged in a matrix; plural bit-line pairs arranged corresponding to each column of the memory cells; a write driver circuit which transmits data to a bit-line pair of a selected column according to write data; and a write assist circuit which drives a bit line on a low potential side of the bit-line pair of a selected column to a negative voltage level. The write assist circuit includes first signal wiring; a first driver circuit which drives the first signal wiring according to a control signal; and second signal wiring which is coupled to the bit line on the low-potential side and generates a negative voltage by the driving of the first driver circuit, based on inter-wire coupling capacitance with the first signal wiring.

Semiconductor storage device

A semiconductor device having a high degree of freedom of layout has a first part AR, in which a plurality of p-type wells PW and n-type wells NW are alternately arranged to be adjacent to each other along an X-axis direction. A common power feeding region (ARP) for the plurality of wells PW is arranged on one side so as to interpose the ARin a Y-axis direction, and a common power feeding region (ARN) for the plurality of wells NW is arranged on the other side. In the power feeding region (ARP) for the PW wells, a p-type power-feeding diffusion layer P+(DFW) having an elongate shape extending in the X-axis direction is formed. A plurality of gate layers GT extending in the X-axis direction to cross the boundary between the PW and NW wells are arranged in the AR, and a plurality of MIS transistors are correspondingly formed.

Semiconductor device and method of manufacturing semiconductor device

A data input buffer is changed from an inactive to an active state after the reception of instruction for a write operation effected on a memory unit. The input buffer is a differential input buffer having interface specs based on SSTL, for example, which is brought to an active state by turning on a power switch to cause a through current to flow and receives a signal therein while immediately following a small change in small-amplitude signal. Since the input buffer is brought to the active state only when the write operation's instruction for the memory unit is provided, it is rendered inactive in advance before the instruction is provided, whereby wasteful power consumption is reduced. In another aspect, power consumption is reduced by changing from the active to the inactive state in a time period from a write command issuing to a next command issuing.

Semiconductor device

Growing community of inventors

Nanae, Japan

Ken Shibata