Fujitsu Corporation

Ken Ryu

Hideyuki Iino

Yoshio Hirose

Hiroyuki Utsumi

Yasumori Hibi

Hideomi Watanabe

Norishige Iwamoto

An OR circuit () OR-operates an emulator reset signal () based on a reset instruction from an emulator () and an external reset signal () supplied from an external reset generation circuit. The OR operation result is distributed and supplied to a processor () and a companion chip () as a system reset signal (), thereby initializing both chips of the processor () and the companion chip () in accordance with the reset the emulator ().

Reset control system and method

A memory control method includes a first step of managing control information in each of memory blocks constituting the memory, the control information joining the memory blocks in a chain according to the frequency of data erasures occurring in each of the memory blocks; and a second step of determining, on the basis of the control information, a memory block that should be a transfer destination of write data.

Control method in which frequency of data erasures is limited

Growing community of inventors

Shinagawa, Japan

Ken Ryu