Texas Instruments Corporation

Other

Ken Numata

Katsuhiro Aoki

Yukio Fukuda

Akitoshi Nishimura

Kay L Houston

Yasutoshi Okuno

Ikuko Murayama

Shigeru Kuroda

Method for manufacturing a ferroelectric capacitor having improved polarization characteristics and a method for manufacturing a ferroelectric memory device incorporating such capacitor

A twisted bit line structure ( ) in an integrated memory circuit, and method for making it are presented. The structure is constructed by forming bit line traces ( ) on an integrated circuit substrate ( ) using phase shift lithography techniques. Using these techniques, the bit line traces are arranged with a plurality of substantially parallel bit lines trace segments ( &prime;) with discontinuous regions between segments of the interior pair ( &prime;) of traces. Thus, each &ldquo;phase &pgr;&rdquo; bit line trace is adjacent a &ldquo;phase 0&rdquo; bit line trace. A first twist connection ( ) is formed between first segments ( &prime;) of the center pair of said bit line trace segments at a first height above the level on which the traces are formed, and, and a second twist connection ( ) is formed between second segments ( &prime;) of the center pair of said bit line trace segments at a second height above the level on which the traces are formed.

Twisted bit line structure and method for making same

A twisted bit line structure (,) in an integrated memory circuit, and method for making it are presented. The structure is constructed by forming bit line traces (,) on an integrated circuit substrate using phase shift lithography techniques. Using these techniques, the bit line traces are arranged with a plurality of substantially parallel bit lines trace segments (,) with discontinuous regions between segments of each trace along a path substantially perpendicular to the bit line traces. Thus, each &ldquo;phase &pgr;&rdquo; bit line trace is adjacent a &ldquo;phase 0&rdquo; bit line trace along two perpendicular axes. A twist connection (,) is formed between first segments (,) of a center pair (,) of said bit line trace segments, and a bit line twist interconnection (,) is formed between second segments (,) of said center pair of said bit line trace segments on a second integrated circuit level from a level containing the bit line traces. Linear interconnections (,) are also formed between segments of outside bit line segments (,) to form continuous untwisted bit lines. The linear interconnections are also formed on an integrated circuit level different from the level containing the bit line traces.

Twisted bit line structures and method for making same

To provide a method that can be used to form a high-qualility ferroelectric film by forming good nuclei when using the sputtering method to manufacture a PZT capacitor or other forroelectric capacitors using Ir or other electrode substances in addition to Pt for the electrode. In the method for manufacturing a PZT ferroelectric capacitor CAP, after titanium film,is deposited on Ir electrode,, lead oxide,is deposited at a substrate temperature higher than the crystallization temperature of lead titanate using the sputtering method. Lead zirconate titanate,is then deposited at a substrate temperature higher than the aforementioned substrate temperature using the sputtering temperature. Afterwards, a heat treatment of the deposited film is performed to produce PZT film

Method for manufacturing ferroelectric capacitor and method for manufacturing ferroelectric memory

An isolation structure which protrudes above the semiconductor surface and sidewall spacers which smooth the topography over said isolation structure.

Shallow trench isolation formation with sidewall spacer

A metal oxide capacitor is manufactured by sequentially laminating a metal oxide film and a secon electrode on a first electrode. The metal oxide film is formed and then heat-treated in an atmosphere with an oxygen pressure higher than 1 atm.

Method for manufacturing metal oxide capacitor and method for

A dielectric capacitor is provided which has a reduced leakage current. The surface of a first electrode (38) of the capacitor is electropolished and a dielectric film (40) and a second electrode (37) are successively laminated on it. The convex parts pointed end (38a) existing on the surface of the first electrode is very finely polished uniformly by dissolving according to electropolishing, a spherical curved surface in which the radius of curvature has been enlarged is formed, and the surface of the first electrode is flattened. Therefore, concentration of electrolysis can be prevented during the operation at the interface of the first electrode and the dielectric film, and the leakage current can be reduced considerably.

Method for manufacturing dielectric capacitor, dielectric memory device

A method for manufacturing semiconductor device having conductive metal leads 14 with improved reliability, and device for same, comprising conductive metal leads 14 on a substrate 12, a first insulating material 18 at least between the conductive metal leads 14, and dummy leads 16 proximate the conductive metal leads 14. Heat from the conductive metal leads 14 is transferable to the dummy leads 16, and the dummy leads 16 are capable of dissipating the heat. The first insulating material 18 has a dielectric constant of less than 3.5. An optional heatsink 22 may be formed in contact with the first dummy leads 16 to further dissipate the Joule's heat from the conductive metal leads 14. An advantage of the invention is to improve reliability of metal leads for circuits using low-dielectric constant materials.

Method of making reliable metal leads in high speed LSI semiconductors

A capacitor and electrode structure comprising a PZT ferroelectric layer 17 with a primary component (Pb) and secondary component (Ti), a lower electrode layer 16 formed on the underside of the ferroelectric layer and made up of a special element (Pt) and Ti, and compounds thereof, and a diffusion barrier layer 18 which is formed on the underside of the lower electrode layer and which functions as a diffusion barrier with respect to Pb. The capacitor and the electrode structure, which may be a component of a semiconductor memory device, suppress fluctuations in the composition of the ferroelectric layer in PZT, etc., so as to maintain the intended performance of the PZT ferroelectric layer, thereby simplifying and stabilizing film fabrication, and preventing the degradation of electrical characteristics and adverse effects on lower layers.

Method for forming high dielectric capacitor electrode structure and

A semiconductor device having metal leads 14 with improved reliability comprising metal leads 14 on a substrate 12, a low-dielectric constant material 18 at least between the metal leads 14, and dummy leads 16 proximate the metal leads 14. Heat from the metal leads 14 is transferable to the dummy leads 16, and the dummy leads 16 are capable of dissipating the heat. The low-dielectric constant material 18 has a dielectric constant of less than 3.5. An advantage of the invention is improved reliability of metal leads for circuits using low-dielectric constant materials.

Reliable metal leads in high speed LSI semiconductors using dummy leads

A semiconductor device (and method of manufacturing thereof) having metal leads (114+130) with improved reliability, comprising metal leads (114+130) on a substrate 112, a low-dielectric constant material (116) at least between the metal leads (114+130), and dummy vias (122+134) in contact with the metal leads (114+130). Heat from the metal leads (114+130) is transferable to the dummy vias (122+134), and the dummy vias (122+134) are capable of conducting away the heat. The low-dielectric constant material (116) may have a dielectric constant of less than about 3.5. An advantage of the invention is to improve reliability of metal leads in circuits using low-dielectric constant materials, especially in scaled-down circuits that are compact in the horizontal direction.

Reliability of metal leads in high speed LSI semiconductors using dummy

A capacitor, electrode, or wiring structure having an alpha ray emitting source (in particular, a Pt electrode), and an alpha ray shielding layer 18, having at least one type selected from the group of simple metals of nickel, cobalt, copper, and tungsten, their compounds or alloys made of at least two types of these simple metals, and compounds and alloys made of these simple metals and silicon is provided. It is possible to shield off the alpha ray effectively, to suppress generation of soft errors, to enable the use of Pt and other new materials in making the electrodes and wiring, and to reduce the cost of the mold resin.

Capacitor, electrode or wiring structure, and semi conductor device

A method for manufacturing semiconductor device having metal leads 14 with improved reliability, and device for same, comprising metal leads 14 on a substrate 12, a low-dielectric constant material 18 at least between the metal leads 14, and thermoconductive insulating layer 22 deposited on the metal leads 14 and the low-dielectric constant material 18, and dummy leads 16 proximate metal leads 14. Heat from the metal leads 14 is transferable to the dummy leads 16 and thermoconductive insulating layer 22, which are both capable of dissipating the heat. A thin thermoconductive layer 24 may be deposited over the metal leads 14 prior to depositing at least the low-dielectric constant material 18 and the thermoconductive insulating layer 22. The low-dielectric constant material 18 has a dielectric constant of less than 3.5. An advantage of the invention is to improve reliability of metal leads for circuits using low-dielectric constant materials.

Reliability of metal leads in high speed LSI semiconductors using both

A method for manufacturing semiconductor device having metal leads 14 with improved reliability, and device for same, including metal leads 14 on a substrate 12, a low-dielectric constant material 18 at least between the metal leads 14, and thermoconductive insulating layer 22 deposited on the metal leads 14 and the low-dielectric constant material 18. Heat from the metal leads 14 is transferable to the thermoconductive insulating layer 22, and the thermoconductive insulating layer 22 is capable of dissipating the heat. The low-dielectric constant material 18 has a dielectric constant of less than 3.5. An advantage of the invention is to improve reliability of metal leads for circuits using low-dielectric constant materials.

Growing community of inventors

Dallas, TX, United States of America

Ken Numata