Brillnics Singapore Pte. Ltd.

The Ritsumeikan Trust

Tohoku Techno Arch Co., Ltd.

Ken Miyauchi

Kazuya Mori

Isao Takayanagi

Hideki Owada

Sangman Han

Shunsuke Okura

Masayuki Uno

Rimon Ikeno

Ai Otani

Kazuki Tatsuta

Ryotaro Hotta

In a pixel signal processing part, a first input switch and an output switch are turned on and off in phase. When the first input switch and the output switch are ON and the second input switch is OFF, a first auto-zero switch and a second auto-zero switch are kept in the ON state to connect the second node to the reference potential (GND), so that a sampling capacitor, a feedback capacitor, and an auto-zero capacitor are operated in respective operation ranges of the capacitors, and the feedback capacitor is kept constant according to a difference of the input pixel signals, thereby making the output of the amplifier in linear response to the input signal.

Solid-state imaging device, method for driving solid-state imaging device, and electronic apparatus

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus that are capable of selecting a pixel operating mode between a RS mode and a GS mode and switching a conversion gain read-out mode, where signals produced with different conversion gains are read, among several options depending on a scene. As a result, the solid-state imaging device, the method for driving the solid-state imaging device and the electronic apparatus can minimize a drop in SNR at the conjunction point between a HCG signal and a LCG signal and also achieve high full well capacity and little dark noise. In a solid-state imaging device, a pixel part includes pixels arranged in a matrix pattern, and each pixel includes a photoelectric conversion reading part. The solid-state imaging device is capable of performing rolling shutter (RS) and global shutter (GS).

A pixel circuitincludes a readable pixel, a comparator, and a selector counter circuit. The readable pixelperforms photoelectric conversion at a photodiode PDand produces a readable signal corresponding to an illuminance condition of incident light. The readable pixelincludes an overflow path extending to a floating diffusion FD. The comparatorcompares a voltage signal (SFout) read out from the readable pixelagainst a reference signal Vref and outputs a comparison result signal Vout indicating the result of the comparison. The selector counter circuitincludes a selector circuit for selecting an external clock or the output Vout from the comparator and a counter circuit for counting the output from the selector circuit.

A solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus are capable of reducing kTC noise of a LCG signal, preventing a drop in SNR at the conjunction point between a HCG signal and the LCG signal, and eventually achieving improved image quality. At a start of a reset period, first and second reset transistors are switched into a conduction state. During a predetermined first period after the reset period starts, the first reset line is kept connected to a reset potential. After the first period elapses, the second reset transistor is switched into a non-conduction state to switch the first reset line into a floating state, so that the first reset line has high impedance. After a second period elapses and when the reset period ends, the first reset transistor is switched into the non-conduction state.

Some embodiments relate to an imaging system including an active pixel a comparator, a write control circuit, and an analog-to-digital conversion (ADC) memory. The active pixel may include a photodiode and a plurality of transistors. The comparator may be operative coupled to the active pixel and configured to receive an output of the active pixel. The write control circuit may be operative coupled to the comparator and configured to receive an output from the comparator. The ADC memory may be operatively coupled to the write control circuit. A data structure may be stored in the ADC memory, and may be configured to store at least a first data string, which may include a set of flag bits for identifying each ADC operation performed and a set of ADC data bits.

System, method, device and data structure for digital pixel sensors

Some embodiments relate to an imaging system including an active pixel and an analog-to-digital conversion (ADC) circuit including comparator. The comparator may be operatively coupled to the active pixel and configured to receive an output of the active pixel. The back-end ADC and memory circuit may be operatively coupled to the active pixel. The back-end ADC and memory circuit may include a write control circuit, an ADC memory operatively coupled to a read/write data bus and to the write control circuit, and a state latch operatively coupled to the write control circuit.

Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus capable not only of having advanced global shutter and autofocus functions but also of sufficiently achieving single exposure high dynamic range (SEHDR) performance, thereby substantially realizing enhanced dynamic range and frame rate. In an image capturing mode, a reading part controls driving of a conversion signal reading part such that the conversion signal reading part keeps first and second transfer transistors in a conduction state in the same transfer period and performs a read-out operation on a pixel signal corresponding to a sum of charges stored in a first photodiode and charges stored in a second photodiode with a first conversion gain and subsequently with a second conversion gain.

One object of the present invention is to provide a solid-state imaging device, a method for fabricating a solid-state imaging device, and an electronic apparatus that implement both a wide dynamic range and a high sensitivity. A storage capacitor serving as a storage capacitance element includes a first electrode and a second electrode on a second substrate surface side. The first electrode is formed of a p+ region (the second conductivity type semiconductor region) formed in the surface of a second substrate surface of a substrate, and the second electrode is formed above the second substrate surface so as to be opposed at a distance to the first electrode in the direction perpendicular to the substrate surface. The first electrode and the second electrode are arranged so as to spatially overlap with a photoelectric conversion part in the direction perpendicular to the substrate surface.

Solid-state imaging device, method for fabricating solid-state imaging device, and electronic apparatus

A source follower element is adjacent to a first lateral part of a floating diffusion in a first direction orthogonal to the first lateral part, a reset element is adjacent to a second lateral part of the floating diffusion in the first direction, and the floating diffusion and the source follower element are connected through a wiring. Some of the photoelectric conversion elements are adjacent to each other in a second direction and spaced away from each other with a first spacing therebetween that allows at least the source follower element and the reset element to be formed therein. Some of the photoelectric conversion elements are adjacent to each other in the first direction and spaced away from each other with a second spacing therebetween that is less than the first spacing.

Solid-state imaging device, method for manufacturing solid-state imaging device, and electronic apparatus

Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions. A pixel signal processing partincludes a first reading partand a second reading part. Of a pixel signal PIXOUT input into an input node ND, the first reading partinverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting partvia a connection node ND. Of the pixel signal PIXOUT input into the input node ND, the second reading partkeeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting partvia the connection node ND

A solid-state imaging device, a method for driving the same, and an electronic apparatus can achieve a high dynamic range based on multiple exposure technique, where images captured with different exposure durations are combined, with it being possible to prevent motion artifacts and LED flickers. A pixel has a 4:0 configuration. The pixel is divided into, for example, four sub-pixels all of which have the same color (for example, G (green)). An access control part sets different charge integration periods and different charge storage starting times between photoelectric conversion parts PD of the sub-pixels and controls the charge integration periods such that they overlap each other. In other words, the access control part sets different charge integration periods and different charge storage starting times, the number of which corresponds to the number of sub-pixels having the same color, and controls the charge integration periods such that they overlap each other.

In a pixel, a floating diffusion FDand a first capacitor CSare selectively connected to each other via a first connection element LG-Tr, to change the capacitance of the floating diffusion FDbetween a first capacitance and a second capacitance, thereby changing the conversion gain between a first conversion gain (HCG) corresponding to the first capacitance and a second conversion gain (MCG) corresponding to the second capacitance. The floating diffusion FDand a second capacitor CSare connected together through a second connection element SG-Tr to change the capacitance of the floating diffusion FDto a third capacitance, thereby changing the conversion gain of the source following transistor SF-Tr to a third conversion gain (LCG) corresponding to the third capacitance.

A pixel includes photoelectric conversion elements for generating charges through photoelectric conversion and storing the generated charges in a storing period, transfer elements for transferring the stored charges, an output node to which the charges stored in the photoelectric conversion elements are transferred through the transfer elements, an output buffer part for converting the charges in the output node into a voltage signal at a level determined by the amount of the charges, and a comparator for performing a comparing operation of comparing the voltage signal from the output buffer part against a referential voltage and outputting a digital comparison result signal. The comparator performs, under control of a reading part, the comparing operation on read-out signals read in at least two different modes through different sequences of operations for reading performed on charges stored in the different photoelectric conversion elements.

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Tokyo, Japan

Ken Miyauchi