Applied Materials, Inc.

Ken MacWilliams

Kartik Ramaswamy

Kenneth S Collins

Andrew Nguyen

Hiroji Hanawa

Hichem M'Saad

Reza Arghavani

Amir Hamed Al-Bayati

Biagio Gallo

Rick J Roberts

An integrated microelectronic circuit has a multi-layer interconnect structure overlying the transistors consisting of stacked metal pattern layers and insulating layers separating adjacent ones of said metal pattern layers. Each of the insulating layers is a dielectric material with plural gas bubbles distributed within the volume of the dielectric material to reduce the dielectric constant of the material, the gas bubbles being formed by ion implantation of a gaseous species into the dielectric material.

Method for ion implanting insulator material to reduce dielectric constant

A method of forming a sidewall spacer on a gate electrode of a metal oxide semiconductor device that includes striking a first plasma to form an oxide layer on a side of the gate electrode, where the first plasma is generated from a oxide gas that includes Oand bis-(tertiarybutylamine)silane, and striking a second plasma to form a carbon-doped nitride layer on the oxide layer, where the second plasma may be generated from a nitride gas that includes NHand the bis-(tertiarybutylamine)silane. The first and second plasmas may be formed using plasma CVD and the bis-(tertiarybutylamine)silane flows uninterrupted between the striking of the first plasma and the striking of the second plasma.

Method for forming a low thermal budget spacer

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Portland, OR, United States of America

Ken MacWilliams