Touchdown Technologies, Inc.

Ken Karklin

Raffi Garaedian

A novel planarizing probe card for testing a semiconductor device is presented. The probe card is adapted to come into contact with a probe card mount that is in adjustable contact with the prober. The probe card includes a printed circuit board affixed to a stiffener and a probe head that is in electrical contact with the printed circuit board. The probe head also includes a plurality of probe contactor tips that define a first plane. The stiffener further contains at least two planarizing adjusters that comes into contact with the probe card mount. The adjusters may be actuated to alter the position of first plane. A surface of the semiconductor device under test may define a second plane, and the adjusters may be adjusted to position the first plane to be substantially parallel to the second plane.

Planarizing probe card

A novel device for testing semiconductor chips is disclosed. A benefit with all the embodiments described herein is that the device may experience zero (or near zero) nascent force. The device may be comprised of a printed circuit board (PCB) that has at least one PCB piercing structure, a probe contactor substrate that has at least one substrate piercing structure, wherein the substrate piercing structure is electrically connected to a probe contactor, and an interposer that has at least one electrical via made of a conductive elastomer. When the PCB piercing structure and the substrate piercing structure pierce the elastomer, the PCB becomes electrically connected to the probe contactor. Instead of the piercing structure, the PCB or the probe contractor substrate may be adhered to the elastomer by an adhesive, such that the PCB becomes electrically connected to the probe contactor. The PCB piercing structure and the substrate piercing structure may include a flying lead wire, soldered pins or pressed pins. The adhesives may include, but are not limited to, screenable conductive surface mount adhesives. Finally, a diagnostic computer may be electrically connected to the PCB to assist in testing the semiconductor chips.

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Pasadena, CA, United States of America

Ken Karklin