Hitachi, Ltd.

Other

Ken'ichi Sakamoto

Takahiko Kozaki

Yasunari Shinohara

Hiroaki Miyata

Koji Wakayama

Kazuho Miki

Shiro Tanabe

Junichirou Yanagi

Tetsuhiko Hirata

An access node run as a packet switching apparatus enables IP connection services for a plurality of access methods; e.g., relatively low-speed IP connection, high-speed IP connection, and mobile network IP connection. By using this apparatus of the present invention, cost can be reduced and upgrading to advanced access networks and access services is easily carried out. Provision of the above access nodes implements upgrade-type network services common for diverse protocols. Each access node retains a pathfinding table to which input port, input tunnel identifier and input session identifier entries in a set are registered per session. When routing a packet, by looking up the set of these entries matching with the packet, the associated output port, output tunnel identifier, and output session identifier are obtained. After processing for the packet, appropriate for one of the plurality of access methods and network services, the node forwards the packet over the routed path.

Packet switching apparatus

A packet handler includes an interface circuit corresponding in one-to-one relation to each input/output port of a switch. A switch interface including a disconnection circuit and a distribution circuit controls the packet from each interface circuit to a corresponding input port and the packet from the output ports of the switch to each interface circuit. In a set of interface circuits, one redundant transmission path can be replaced arbitrarily with two non-redundant independent transmission paths. The packet communication system can thus accommodate redundant transmission paths and non-redundant transmission paths in an arbitrary ratio.

Packet handler

A packet switching apparatus is constructed by a basic module disposed in the apparatus casing and an additional module disposed on the outside of the apparatus casing. The basic module has a common processing function irrespective of an access method and a service type, an interface accommodating lines to be connected to the Internet, and a plurality of interface boards conformed to a specific access method by which a hardware scale may be small. Only the basic module functions as a packet switching apparatus, and a processing function peculiar to each access method and service type is executed by the additional module.

A packet handler includes an interface circuit of an ATM handler corresponding in one-to-one relation to each input/output port of an ATM switch. A switch interface including a disconnection circuit and a distribution circuit controls the cell flow from each interface circuit to a corresponding input port and the cell from the output ports of the ATM switch to each interface circuit. In a pet of interface circuits, one redundant transmission path can be replaced arbitrarily with two nonredundant independent transmission paths. The ATM communication system can thus accommodate redundant transmission paths and nonredundant transmission paths in an arbitrary ratio.

A packet handler includes an interface circuit of an ATM handler corresponding in one-to-one relation to each input/output port of an ATM switch. A switch interface including a disconnection circuit and a distribution circuit controls the cell flow from each interface circuit to a corresponding input port and the cell from the output ports of the ATM switch to each interface circuit. In a set of the interface circuits, one redundant transmission path can be replaced arbitrarily with two nonredundant independant transmission paths. The ATM communication system can thus accomodate redundant transmission paths and nonredundant transmission paths in an arbitrary ratio.

An ATM handler that sets a switchover indication to a control register according to a system switchover order from a controller such that a switchover indication is supplied to a selector and line interfaces according to an output signal from the register. The setting of a switchover indication synchronize a switchover of an operation to count user cells between the line interfaces of the active and standby systems with a switchover of a stream of input cells to an ATM switch by a selector. A protection period is provided to allow a time after the system switchover according to a transmission delay lag. The line interface related to a delayed phase assigns a bit for stopping counting to cells input during the protection period so that the counting operation is conducted for the cells other than those assigned with the bit for stopping counting. As a result, duplicate of counting cells is prevented and the number of user cells are accurately counted.

Asynchronous transmission mode (ATM) handler

A packet handler includes an interface circuit of an ATM handler corresponding in one-to-one relation to each input/output port of an ATM switch. A switch interface including a disconnection circuit and a distribution circuit controls the cell flow from each interface circuit to a corresponding input port and the cell from the output ports of the ATM switch to each interface circuit. In a set of interface circuits, one redundant transmission path can be replaced arbitrarily with two nonredundant independent transmission paths. The ATM communication system can thus accommodate redundant transmission paths and nonredundant transmission paths in an arbitrary ratio.

Growing community of inventors

Tokyo, Japan

Ken'ichi Sakamoto