Honda Motor Co., Ltd.

Sharp Kabushiki Kaisha Corporation

Shindengen Electric Manufacturing Company Limited

Fuji Electric Systems Co. Ltd.

Honda Giken Kogyo Kabushiki Kaisha

Fuji Electric Co., Ltd.

Ken-ichi Nonaka

Hideki Hashimoto

Seiichi Yokoyama

Hitoshi Sumida

Akinobu Teramoto

Koichi Nishikawa

Yusuke Fukuda

Toshio Naka

Masaaki Shimizu

Yoshimitsu Saito

Hiroaki Iwakuro

Kensuke Iwanaga

Masaaki Abe

Yusuke Maeyama

A miniaturizable, low-cost highly reliable inverter unit. A control circuit section for controlling operating timing of high breakdown voltage semiconductor elements included in an inverter circuit section and first and second drive and abnormality detection circuit sections for outputting drive signals for driving the high breakdown voltage semiconductor elements according to the operating timing and for feeding back an abnormality of the inverter circuit section to the control circuit section are formed on an SOI substrate as one integrated circuit chip. On the integrated circuit chip, circuit formation areas which differ in reference potential are separated from one another by dielectrics. A plurality of level shifters for transmitting signals exchanged between circuit formation areas separated by the dielectrics are formed.

Inverter unit, integrated circuit chip, and vehicle drive apparatus

A semiconductor crystal having a recombination-inhibiting semiconductor layer of a second conductive type that is disposed in the vicinity of the surface between a base contact region and emitter regions and that separates the semiconductor surface having a large number of surface states from the portion that primarily conducts the positive hole electric current and the electron current. Recombination is inhibited, and the current amplification factor is thereby improved and the ON voltage reduced.

Bipolar semiconductor device and manufacturing method thereof

A semiconductor crystal includes a recombination-inhibiting semiconductor layer () of a second conductive type that is disposed in the vicinity of the surface between a base contact region () and emitter regions () and that separates the semiconductor surface having a large number of surface states from the portion that primarily conducts the positive hole electric current and the electron current. Recombination is inhibited, and the current amplification factor is thereby improved and the ON voltage reduced.

A method for manufacturing an ion implantation mask is disclosed which includes the steps of: forming an oxide film as a protective film over the entire surface of a semiconductor substrate; forming a thin metal film over the oxide film; and forming an ion-inhibiting layer composed of an ion-inhibiting metal over the thin metal film. The obtained ion implantation mask is used to form a deeper selectively electroconductive region.

Method for manufacturing ion implantation mask, and method for manufacturing silicon carbide semiconductor device

A method for manufacturing a junction semiconductor device having a drain region including a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region including a low-resistance layer of a first conductive type formed on the other surface of the semiconductor crystal, a gate region of a second conductive type formed on the periphery of the source region, a high-resistance layer of a first conductive type between the source region and the drain region, and a recombination-inhibiting semiconductor layer of a second conductive type provided in the vicinity of the surface of the semiconductor crystal between the gate region and the source region.

Method for manufacturing junction semiconductor device

Ion implantation mask and method for manufacturing same, silicon carbide semiconductor device using ion implantation mask, and method for manufacturing same

A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.

A junction semiconductor device having a drain region including a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region including a low-resistance layer of a first conductive type formed on the other surface of the semiconductor crystal, a gate region of a second conductive type formed on the periphery of the source region, a high-resistance layer of a first conductive type between the source region and the drain region, and a recombination-inhibiting semiconductor layer of a second conductive type provided in the vicinity of the surface of the semiconductor crystal between the gate region and the source region.

Junction semiconductor device and method for manufacturing the same

A semiconductor device is provided with a surface-inactivated semiconductor layer provided on the surface of a compound semiconductor on which surface a semiconductor layer forming the depletion layer is provided, the semiconductor layer forming the depletion layer being of a conduction type opposite that of the compound semiconductor, and having a carrier density and thickness being capable of forming a depletion layer on the compound semiconductor. When a depletion layer is formed on the surface of the compound semiconductor by the semiconductor layer forming the depletion layer, the depletion layer has no charge so that the concentration of electrical fields is relaxed, the surface of the semiconductor is stabilized, and excellent dielectric breakdown performance is obtained.

Growing community of inventors

Wako, Japan

Ken-ichi Nonaka