Raytheon Company

Hughes Aircraft Company

Kelvin T Tran

Lloyd Frederick Linder

Dwight D Birdsall

Phillip L Elliott

Donald G McMullin

Don C Devendorf

Erick M Hirata

Michael Naone Farias

Benjamin Felder

Clifford Duong

Khanh Lam

Roger N Kosaka

Tim M Ng

Hieu M Le

Carrie C Lo

A low noise, low distortion radio frequency amplifier which includes a bootstrap design to minimize intermodulation distortion while simultaneously achieving low noise and wide bandwidth. In the illustrative embodiment, the invention includes a first circuit for receiving an input signal; a second circuit for amplifying the input signal using a transistor Q ; and a third circuit for regulating a rate of change of voltage across the transistor Q such that the rate of voltage change is zero. The third circuit includes a transistor Q connected to the transistor Q in cascode. In the specific illustrative embodiment, the third circuit further includes two diodes D and D used to modulate the voltage at the input of the transistor Q in proportion to the voltage modulation at the input of the transistor Q . In the illustrative embodiment, the second circuit includes a transistor Q connected in cascade to the transistor Q . In the specific illustrative embodiment, the invention further includes a fourth circuit for regulating a rate of change of voltage across the transistor Q such that the rate of voltage change is zero. The fourth circuit includes a transistor Q connected to the transistor Q in cascode. The two diodes D and D also connect the transistors Q and Q such that the voltage at the input of the transistor Q is modulated in proportion to the voltage modulation at the input of the transistor Q

Low noise, low distortion RF amplifier topology

A monolithic class AB (push-pull) low noise amplifier having feedback and self bias. The low noise amplifier exhibits low power, high intercept point, low noise figure, well matched terminal impedances over wide range of frequency, and may be monolithically implemented. The amplifier may be produced using CMOS process technologies. The amplifier comprises NMOS and PMOS transistors serially coupled between a voltage rail and ground. The amplifier uses self biasing embodied in a bias resistor coupled between an input shunt capacitor and respective drains of the NMOS and PMOS transistors, which allows for maximum gate-to-source voltage and higher transconductance for a minimum aspect ratio (W/L). This results in a wider bandwidth and reduced power for the amplifier. The use of a shunt--shunt feedback network comprising a shunt resistor and a serially coupled shunt capacitor coupled between respective gates and drains of the NMOS and PMOS transistors, provides better terminal impedance matching over wide bandwidth.

Monolithic class AB shunt-shunt feedback CMOS low noise amplifier having

A current steering circuit diverts bias current from a differential current summing amplifier's front end when the differential input exceeds a safe threshold level, thus preventing the amplifier's output stage from being overdriven. Diverting the front end's bias currents also turns off transistors within the amplifier's front end and thus protects the front end from damage which may otherwise result from excessive input signals.

Current feedback differential amplifier clamp

A low-noise, low-distortion clamping scheme includes a bootstrapped voltage clamp and an R.sub.gm current clamp that provide superior overdrive protection when used together in a Class-AB feedback amplifier. The bootstrapped voltage clamp includes a transistor that is connected to a circuit node to be clamped. The transistor's base is bootstrapped to the node to maintain a constant V.sub.be when not clamping, to reduce the adverse effects of the junction capacitance C.sub.je which would normally vary with the node voltage and distort the signal at the node. Two such clamps provide positive and negative voltage limiting. The R.sub.gm current clamp is used in the input stage of a Class-AB feedback amplifier to limit the current through the resistor R.sub.gm that interconnects the current inputs of two transconductance amplifiers whenever the voltage drop across R.sub.gm increases to an unacceptable level. The clamp uses a dependent current source whose output current increases with the magnitude of the current flowing through R.sub.gm and prevents that current from exceeding a predetermined limit. When not clamping, the clamp has a very small effect on the amplifier's input stage. Two R.sub.gm current clamps are typically used to limit current flowing in either direction through R.sub.gm.

Overdrive protection clamp scheme for feedback amplifiers

A bias voltage source (20) produces a variable bias voltage (VBREF) which regulates the bias currents in an array (30) of transistor current switch cells (34,36) in an digital-to-analog converter (DAC). The bias voltage (VBREF) is applied to the bases of the regulating transistors (Q8') in the cells (34,36) to regulate the bias currents in their respective main transistors (Q6',Q7') to values proportional to the main bias current (IBIAS). Each main transistor (Q6,Q6',Q7,Q7') and regulating transistor (Q8,Q8') is provided with a compensating transistor (Q10,Q10')(Q11,-Q11') which sinks the emitter-base current thereof and cancels deviation of the actual current gain from the design current gain. Another compensating transistor (Q9,Q9') is connected to each regulating transistor (Q8,Q8') to cancel the effect of base-emitter voltage variation with temperature.

Transistor current switch array for digital-to-analog converter (DAC)

First and second current feedback transconductance amplifiers (102,104) each have a high impedance voltage input, a low impedance current input and a pair of push-pull current outputs. In a single-ended configuration, an input signal is applied to the voltage input of the first transconductance amplifier (102) and the push-pull outputs of the both transconductance amplifiers are connected through a current mirror (136,138) to a node (134) where the current outputs are summed. The node current is integrated by a capacitor (174) to produce a voltage which is amplified by a transimpedance amplifier (190) to produce an output voltage which is fed back to the voltage input of the second transconductance amplifier (104). The current inputs of the transconductance amplifiers (102,104) are interconnected by a resistor (132). The high impedance voltage inputs produce common-mode cancellation of distortion in the transconductance amplifiers (102,104) and low input shot noise. In a differential configuration, differential input signals are applied to the voltage inputs of transconductance amplifiers (260,262), and a separate transimpedance amplifier (292,316) and current mirror (278,280) (302,304) is provided for each transconductance amplifier (260,262). A common-mode feedback circuit (352) controls the common-mode output voltages of the transimpedance amplifiers (292,316) to ground. Switch means (402,404,406,408,410,412) may be added to selectively ground the voltage inputs of the transconductance amplifiers (260,262) and disable their input stages by disconnecting their power supplies (VCC,VEE).

Single-ended and differential amplifiers with high feedback input

A bandgap reference voltage source (104) has positive and negative terminals (104a,104b) which are connected through high impedance constant current sources (124c,126c) to positive and negative voltage supplies (+VDD,-VEE) respectively. The effect of variations of the voltage supplies (+VDD, -VEE) on the voltage source (104) is low due to the high impedances of the currents sources (124c,126c), providing a high power supply rejection ratio (PSRR). The reference voltage (VREF) generated by the voltage source (104) is converted into a reference current (IREF) which flows through two equal series resistors (108,110), and also through current mirrors (124,126) which produce positive and negative output currents corresponding thereto. The current sources (124c,126c) for the voltage source (104) are also controlled by the current mirrors (124,126). A servo control amplifier (232) senses the voltage at the junction (234) of the resistors (108,110) and adjusts the voltage at either the positive or negative terminal (104a,104b) of the voltage source (104) to maintain the voltages at the terminals (104a,104b) symmetrical with respect to ground, thereby preventing the voltage source (104) from latching to one of the voltage supplies (+VDD,-VEE) during startup.

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Carson, CA, United States of America

Kelvin T Tran