Dialog Semiconductor (uk) Limited

Linear Technology Corporation

Kelly Consoer

Kevin Yi Cheng Chang

Mark Mercer

Bryan Quinones

A switching power converter is provided with a one-shot bias boosting circuit that responds to a premature trip point to boost the performance of a linear comparator in a pulse width modulator. In a sense-amplifier based implementation of the comparator, a clock-edge generator boosts the performance of the sense amplifier at the premature trip point.

High-efficiency pulse width modulation for switching power converters

A pulse-width-modulated switching power converter is provided in which a comparator has a boosted speed to determine a trip point at which a ramp signal equals an error signal. In a linear comparator embodiment, a one-shot bias boosting circuit triggers an increased bias current to the linear comparator to boost the speed to determine the trip point. In a sense-amplifier-based comparator embodiment, a clock generator enables the sense-amplifier-based comparator prior to the trip point.

Driver circuits with S-shaped gate drive voltage curves for ramp-up and ramp-down of power field effect transistors are presented. In ramp-up, the S-shaped curve rapidly ramps the gate voltage of the power FET to its threshold. This ramp-up is self-terminating. The gate voltage of the power FET is slewed through saturation with a time constant. After a predetermined time, the gate of the power FET is driven to approach the supply voltage level. In ramp-down, the S-shaped curve rapidly ramps the gate voltage of the power FET down to its threshold voltage. This ramp-down is self-terminating. The gate voltage of the power FET is slewed through saturation. The gate-source voltage of the power FET is rapidly ramped down to zero. Such S-shaped curves for the gate drive signal allow the control of the transition times of the gate drive signal to acceptable levels of voltage/current spikes and electromagnetic interference.

Switching regulator slew rate control with S-curve shaping

A chopper stabilized bandgap voltage reference circuit comprises current mirror circuitry mirroring first and second currents into first and second networks to generate a forward diode voltage signal and a PTAT (proportional to absolute temperature) component signal, and a third current having a derived temperature coefficient into a third network to generate a reference voltage signal for a regulator. An amplifier amplifies a differential signal of the forward diode voltage signal and the PTAT component signal to output a fourth current to control the first and second currents. According to a chopper clock, a modulator modulates the differential signal to be supplied to the amplifier and a demodulator demodulates the fourth current. A gain loop compensation circuit is coupled to the demodulator to compensate the amplifier, and filter the fourth current for noise components, and a bypass circuit is also provided to the third network for filtering the third current.

Growing community of inventors

Tempe, AZ, United States of America

Kelly Consoer