Novatek Microelectronics Corp.

Keko-Chun Liang

Ju-Lin Huang

Che-Wei Yeh

Yu-Hsiang Wang

Yi-Chuan Liu

Po-Hsiang Fang

Jhih-Siou Cheng

Yong-Ren Fang

Chia-Wei Su

Cheng-Hung Chen

Chieh-An Lin

Tzu-Chien Tzeng

Yi-Yang Tsai

Hsu-Chih Wei

Shen-Iuan Liu

Po-Yu Tseng

Chun-Yung Cho

Li-Tang Lin

Chun-Wei Kang

Chun-Yu Lin

Wen-Yi Hsieh

Ming-Dou Ker

Chih-Hsien Chou

Jin-Yi Lin

Po-Ying Chen

Jie-Ting Chen

Nien-Tsung Hsueh

Jui-Chan Chang

Chang-Cheng Huang

Ho-Chun Chang

A control system includes a plurality of driving circuits coupled in series, which include a first driving circuit and a second driving circuit. The first driving circuit includes a first receiver, a first transmitter and a first flag signal selector. The first transmitter is coupled to the first receiver, and the first flag signal selector is coupled between the first receiver and the first transmitter. The second driving circuit, coupled to the first driving circuit, includes a second receiver, a second transmitter and a second flag signal selector. The second transmitter is coupled to the second receiver, and the second flag signal selector is coupled between the second receiver and the second transmitter.

Control system with cascade driving circuits and related driving method

A display control system for controlling a display panel having a plurality of display zones includes a main controller, a plurality of display driver circuits and a plurality of memories. Each of the display driver circuits is coupled to a corresponding display zone among the plurality of display zones, to control the corresponding display zone. Each of the memories is coupled to a corresponding display driver circuit among the plurality of display driver circuits, to store a compensation data for the corresponding display zone controlled by the corresponding display driver circuit. The plurality of display driver circuits are cascaded through a plurality of first transmission channels and connected through at least one second transmission channel, and each of the first transmission channels is coupled between two of the plurality of display driver circuits or between one of the plurality of display driver circuits and the main controller.

Display control system for splicing screen

The present invention discloses a display panel and a display device. The display panel comprises a plurality of common electrode blocks and a plurality of display regions. During a display period, one or more common electrode blocks corresponding to one of the display regions which is to be displayed during the display period are coupled to a common voltage; and during the display period, one or more of the common electrode blocks corresponding to the display regions which are not to be displayed during the display period are kept in a floating state.

Display panel, display device and driving method

A display driver and a charge recycling method are provided. The display driver includes a charging and discharging circuit and a control circuit. A first terminal of the charging and discharging circuit is coupled to at least one of the scan lines, and a second terminal of the charging and discharging circuit is coupled to at least one of the data lines. The control circuit is coupled to a first control terminal and a second control terminal of the charging and discharging circuit. The charging and discharging circuit receives a first current generated by discharging the at least one of the scan lines to charge the capacitor based on a first control signal. The charging and discharging circuit discharges the capacitor to generate a second current for charging the at least one of the data lines based on a second control signal.

Display driver and charge recycling method using the same

A light-emitting diode LED driver and a LED driving device including the LED driver are provided. The light-emitting diode LED driver includes a decoding circuit that receives a data signal and decodes the data signal to generate display data used to drive LEDs to emit light and display and a recovered clock signal. Further provided is an encoding circuit that encodes the decoded display data by using the recovered clock signal to generate an encoded data signal, where the data signal is encoded in a first encoding format, and the encoded data signal is encoded in a second encoding format.

Light-emitting diode driver and light-emitting diode driving device

The present disclosure provides a method for a display driver system and a display driver system. The method comprises: the control circuit transmitting a global signal and a first signal for a LED driver circuit in each stage to a first-stage LED driver circuit, wherein the global signal includes an command for indicating an operation mode of the LED driver circuit in each stage; the LED driver circuit in each stage determining the operation mode corresponding to the command according to the global signal, identifying a corresponding first signal of the LED driver circuit in the stage, and operating according to the determined operation mode and the corresponding first signal; and the LED driver circuit in each stage except for last stage transmitting the global signal to the LED driver circuit in its next stage, and in response to a completion of operation according to the determined operation mode and the corresponding first signal, transmitting the first signal for the LED driver circuit in each of sequential stages to the LED driver circuit in its next stage.

Method for display driver system and display driver system

The disclosure provides a data receiver, including a first capacitor, a second capacitor, a first inverter and a second inverter. The first capacitor has a first terminal and a second terminal, and the first terminal receives a first input signal. The second capacitor has a third terminal and a fourth terminal, and the third terminal receives a second input signal. The first inverter has a first input terminal and a first output terminal. The second inverter has a second input terminal and a second output terminal. The first input terminal and the second output terminal are coupled to the second terminal of the first capacitor, and the second input terminal and the first output terminal are coupled to the fourth terminal of the second capacitor. The first output terminal generates a first output signal with a first output voltage, and the second output terminal generates a second output signal with a second output voltage.

Data receiver for achieving functions of level shifter and amplifier circuit

A LED driving apparatus with clock embedded cascaded LED drivers is introduced, including: a plurality of LED drivers, wherein the first stage LED driver receives an original data signal and outputs a first data signal, the Nth stage LED driver receives a (N&#x2212;1)th data signal and outputs a Nth data signal. The Nth stage LED driver includes a clock data recovery circuit generating a recovery clock signal and a recovery data signal according to the (N&#x2212;1)th data signal; and a first transmitter outputting the Nth data signal according to the recovery clock signal and the recovery data signal.

Light-emitting diode driving apparatus and light-emitting diode driver

A display control system includes a plurality of driver circuits connected in series. A driver circuit among the plurality of driver circuits includes a receiver, a duty cycle correction circuit and a transmitter. The receiver is configured to receive a first signal from a previous driver circuit among the plurality of driver circuits. The duty cycle correction circuit, coupled to the receiver, is configured to adjust a duty cycle of the first signal to generate a second signal. The transmitter, coupled to the duty cycle correction circuit, is configured to transmit the second signal to a next driver circuit among the plurality of driver circuits.

Display control system and related method of signal transmission

A clock generator includes a pulse generator and a duty cycle correction circuit. The pulse generator is configured to receive an input clock signal and generate a pulse signal according to the input clock signal. The duty cycle correction circuit, coupled to the pulse generator, is configured to adjust a duty cycle of the pulse signal to generate an output clock signal.

Clock generator for frequency multiplication

A control system includes a plurality of driving circuits coupled in series, which includes a first driving circuit and a second driving circuit. The first driving circuit includes a first receiver, a first transmitter and a replica receiver. The first transmitter is coupled to the first receiver, and the replica receiver is coupled to an output terminal of the first transmitter. The second driving circuit, coupled to the first driving circuit, includes a second receiver and a second transmitter. The second receiver is coupled to the first transmitter, and the second transmitter is coupled to the second receiver.

A LED driving apparatus with differential signal interfaces is introduced, including: N-stages LED drivers, wherein the first stage LED driver receives a first data packet differential signal and a first clock differential signal and outputs a second data packet differential signal and a second clock differential signal, the Mth stage LED driver receives a Mth data packet differential signal and a Mth clock differential signal and outputs a (M+1)th data packet differential signal and a (M+1)th clock differential signal.

A display apparatus and a method for noise reduction are introduced. The method comprises steps of sensing a first pixel signal being superimposed by noises from a first pixel through a first sensing line in a first phase of a sensing operation and sensing a first noise signal from the first sensing line in a second phase of the sensing operation. The method further comprises steps of sensing a second noise signal from a second sensing line in the first phase of the sensing operation, and sensing a third noise signal from the second sensing line in the second phase of the sensing operation. The method further removes the noises that are superimposed to the first pixel signal according to a difference between the first pixel signal and the first noise signal and a difference between the second noise signal and the third noise signal to generate a denoised sensing value of the first pixel.

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Hsinchu, Taiwan

Keko-Chun Liang