Tokyo Shibaura Denki Kabushiki Kaisha

Kabushiki Kaisha Toshiba

Tokyo Shibaura Electric Co., Ltd.

Keizo Tani

Makoto Hideshima

Yutaka Tomisawa

Junichi Nakao

Kenichi Muramoto

Noboru Fuse

Masahiro Ogasawara

Eiji Kotani

Masaaki Iwanishi

Ken-ichi Muramoto

An additional p-n junction diode, having a forward bias voltage smaller than a forward bias voltage between the base and emitter of a first-stage specific transistor of 3-stage Darlington connected npn transistors, is electrically connected in parallel between a p-type base layer and an n-type collector layer of the specific transistor. The polarities of the p-type and n-type layers of the diode are respectively the same as those of the parallel-connected p-type base and n-type collector layers of the specific transistor.

Semiconductor device having darlington-connected transistor circuit

There is provided a method of producing a semiconductor device comprising a protecting silicone gel layer which covers a semiconductor chip and bonding wires for taking electrodes out of this chip, and a resin layer which has a smaller thermal expansion coefficient than that of this silicone gel layer at least part of which contacts the silicone gel layer. This method comprises the steps of: thermally expanding the silicone gel layer until it reaches the product environmental guarantee temperature which comes before the cure acceleration reaction in the resin layer; and completely curing the resin layer while maintaining the volume of the silicone gel layer at the same time, thereby fixedly adhering it with the other parts.

Method of producing a semiconductor device

A semiconductor device with a planar p-n junction and a guard ring region, wherein an oxide film is covered on the surface between the p-n junction and the guard ring, and a glass film is formed on the surface surrounding the guard ring region.

Semiconductor device with glass layer contacting outer periphery of

A junction type field effect transistor comprises a semiconductor layer of one conductivity type acting as a drain region, a source region of said one conductivity type formed to a prescribed depth from the surface of the semiconductor layer, an insulation layer formed to a prescribed depth from the surface of the semiconductor layer to surround the source region, and a gate region of the opposite conductivity type formed in the proximity of the sorce region. The insulation layer and source region are formed to substantially the same depth.

Junction type field effect transistor with source at oxide-gate

A junction type semiconductor device, wherein a protective diode is formed in a part of the region consisting of a base region and a collector region. The device permits reducing the manufacturing cost of semiconductor elements, makes it possible to provide a smaller electric apparatus, and is high in reliability.

Growing community of inventors

Tokyo, Japan

Keizo Tani