Sony Semiconductor Solutions Corporation

Sony Corporation

Keizo Hiraga

Masahiro Segami

Lui Sakai

Yasuo Kanda

Yusuke Shuto

A semiconductor circuit according to an embodiment of the present disclosure includes a nonvolatile latch circuit that stores k-bit data, and m-bit error correction data for the k-bit data.

Semiconductor circuit including latch circuit for error correction

A non-volatile storage circuit () of an embodiment includes a volatile storage unit () that stores information, a non-volatile storage unit () into which the information in the volatile storage unit is written by a store operation, and from which the information is read out to the volatile storage unit () by a restore operation via a restore path different from a store path in the store operation, a driver unit () that receives a power supply and performs the store operation, and a switch unit () that shuts off the power supply to the driver unit () during the restore operation.

Non-volatile storage circuit

A semiconductor circuit of the present disclosure includes: a volatile first storage section; a volatile second storage section that stores data stored in the first storage section on the basis of a first control signal; a non-volatile third storage section that stores data according to data stored in the second storage section on the basis of a second control signal, and causes the first storage section to store data stored in itself on the basis of a third control signal; and a control section that generates the first control signal and the third control signal, and compares the data stored in the first storage section and the data stored in the second storage section with each other to generate the second control signal on the basis of a result of the comparison.

Semiconductor circuit and method of controlling same

A semiconductor circuit according to the disclosure includes a first circuit that can generate an inverted voltage of a voltage at a first-node and apply the inverted voltage to a second-node, a second circuit that can generate an inverted voltage of the voltage at the second-node and apply the inverted voltage to the first-node, a first transistor coupling the first-node to the third-node by turning on, a first storage element having a first terminal coupled to the third-node and a second terminal supplied with a control voltage and being able to take a first or second resistance state, a first voltage setting circuit that is coupled to the third-node and can set a voltage at the third-node to a voltage corresponding to a voltage at a predetermined node out of the first and second nodes, and a driver controlling an operation of the first transistor and setting the control voltage.

Semiconductor circuit and semiconductor circuit system

A semiconductor circuit of the disclosure includes: a sequential circuit unit including a plurality of logic circuit units that include respective flip flops and respective non-volatile storage elements, the sequential circuit unit performing, in a first term, store operation in which the storage elements in the plurality of the logic circuit units store respective voltage states in the plurality of the logic circuit units, and shift operation in which the flip flops in the plurality of the logic circuit units operate as a shift register; and a first memory that stores, in the first term, first data or second data, the first data being outputted from the shift register by the shift operation, and the second data corresponding to the first data.

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Tokyo, Japan

Keizo Hiraga