Micron Technology Incorporated

Elpida Memory, Inc.

Ps4 Luxco S.a.r.l.

Keiyo Kusanagi

Fumitomo Watanabe

Mitsuhisa Watanabe

Koichi Hatakeyama

Yutaka Kagaya

Akihiko Hatasawa

Koya Kikuchi

Katsumi Sugawara

Noriou Shimada

Hisashi Tanie

Hiroyuki Fujishima

Yoshiharu Kanegae

Several aspects of the present technology are directed toward fan-out packaged semiconductor devices having an integrated shield. The shield can include a conductive wall and a conductive cap over a redistribution structure. The shield can surround or at least partially enclose circuits placed or formed on the redistribution structure. The circuits and/or the conductive cap can be covered by an encapsulant, and the conductive cap can be on an upper surface of an encapsulant.

Shielded fan-out packaged semiconductor device and method of manufacturing

Stacked semiconductor die assemblies with die substrate extensions are disclosed herein. In one embodiment, a semiconductor die assembly can include a package substrate, a first die mounted to the package substrate, and a second die mounted to the first die. The first die includes a first die substrate, and the second die includes a second die substrate attached to the first die substrate. At least one of the first and second dies includes a semiconductor substrate and a die substrate extension adjacent the semiconductor substrate. The die substrate extension comprises a mold material that at least partially defines a planform.

Stacked semiconductor die assemblies with die substrate extensions

Several aspects of the present technology are directed toward fan-out packaged semiconductor devices having an integrated shield to protect against electromagnetic interference and methods of manufacturing such devices. The shield can be constructed by forming a conductive wall on a redistribution structure and disposing a conductive cap on an upper surface of an encapsulant. The conductive wall and the conductive cap are electrically connected to each other. By forming the conductive wall directly on the redistribution structure and separately disposing the conductive cap onto an upper surface of the encapsulant, an electromagnetic shield can be readily formed using wafer-level or panel-level processing techniques that are efficient and cost-effective. Several embodiments of semiconductor devices in accordance with the present technology accordingly shield the integrated circuitry of semiconductor dies from electromagnetic interference.

A semiconductor device includes a wiring board; a stack of semiconductor chips disposed over the wiring board, each of the semiconductor chip comprising via electrodes, the semiconductor chips being electrically coupled through the via electrodes to each other, the semiconductor chips being electrically coupled through the via electrodes to the wiring board; a first seal that seals the stack of semiconductor chips; and a second seal that covers the first seal. The first seal is smaller in elastic modulus than the second seal.

Semiconductor device and method of forming the same

Disclosed herein is a device that includes: a semiconductor substrate having a first surface on which a plurality of circuit elements are formed and a second surface opposite to the first surface; an insulating layer covering the second surface of the semiconductor substrate; and a penetration electrode having a body section that penetrates through the semiconductor substrate and a protruding section that is connected to one end of the body section and protrudes from the second surface of the semiconductor substrate. The second surface of the semiconductor substrate is covered with the protruding section of the penetration electrode without intervention of the insulating layer.

Semiconductor device having penetration electrode penetrating through semiconductor substrate

A semiconductor device includes a substrate, a stack of semiconductor chips, and a first sealing material. The substrate may include, but is not limited to, a chip mounting area and a higher-level portion. The higher level portion surrounds the chip mounting area. The higher-level portion is higher in level than the chip mounting area. The stack of semiconductor chips is disposed over the chip mounting area. A first sealing material seals the stack of semiconductor chips. The first sealing material is confined by the higher-level portion.

Semiconductor device, method of forming the same, and electronic device

In one embodiment, a semiconductor device includes a printed wiring board provided with a connection pad, a semiconductor chip provided with an electrode pad and a conductive wire. One end of the conductive wire is connected to the connection pad of the printed wiring board and the other end of the conductive wire is connected to the electrode pad of the semiconductor chip. The semiconductor chip is mounted on the printed wiring board so that the first surface of the semiconductor chip provided with the electrode pad is oriented opposite to the printed wiring board. A first insulating layer is formed on the first surface of the semiconductor chip oriented opposite to the printed wiring board. A thermoplastic second insulating layer is formed on the first insulating layer. Part of the conductive wire between one end and the other end is buried in the second insulating layer.

Semiconductor device provided with wire that electrically connects printed wiring board and semiconductor chip each other

A semiconductor device includes a substrate, a semiconductor chip, and first and second insulations. The substrate has at least a first region and a second region. The semiconductor chip structure covers the first region. The first insulation covers the second region. The first insulation has a first thermal expansion coefficient approximately equal to that of the semiconductor chip structure. The second insulation covers the semiconductor chip structure and the first insulation so that the semiconductor chip structure and the first insulation are sandwiched between the substrate and the second insulation. The second insulation has a second thermal expansion coefficient approximately equal to that of the substrate.

Semiconductor device and method of manufacturing the same

A semiconductor device includes: an insulating tape having a device hole and a plurality of holes; a plurality of leads formed on one surface of the tape and extending at one end into the device hole and at the other end into the holes; a semiconductor chip having a plurality of electrodes on a main surface thereof, being connected with the leads extending into the device hole; an encapsulant formed of an insulating resin, the leads and a predetermined portion of the tape; bump electrodes provided on one surface of the leads; slits provided in the tape between the encapsulant and the bump electrodes and extending along a column of the bump electrodes; and a warp prevention reinforcement made of an insulating film and formed over the tape; wherein the semiconductor chip and the bump electrodes are connected to one and the same surface side of the leads.

Semiconductor device including a semiconductor chip formed on an insulating element such as a tape, and including an improved insulating arrangement

In a semiconductor device in which a plurality of substrates each mounting a semiconductor chip are stacked, one ends of the leads formed on the substrates are connected to the semiconductor chip and the other ends thereof are connected to connection terminals of the substrates. At least one of the leads are branched into two or more in the vicinity of the connection terminals, and one ends of the branched leads are connected to the connection terminals. A technique for sorting good products is performed in a state in which the chips are mounted on the substrates.

Growing community of inventors

Akita, Japan

Keiyo Kusanagi