Micron Technology Incorporated

Keith W Smith

David A Korn

Phillip G Wald

Clarence J Higdon

Charles E Carver

In one aspect, the invention includes a semiconductor processing method comprising depositing a silicon layer over a substrate at different deposition temperatures which at least include increasing the deposition temperature through a range of from about 550&deg; C. to about 560&deg; C. In another aspect, the invention includes a semiconductor processing method comprising, in an uninterrupted deposition process, depositing a silicon layer which comprises an essentially amorphous silicon region, an essentially polycrystalline silicon region, and a transition region interconnecting the essentially amorphous silicon region and the essentially polycrystalline silicon region, the essentially amorphous silicon region having an amorphous silicon content which is greater than or equal to about 90 weight percent of a total material of the amorphous silicon region, the essentially polycrystalline silicon region having a polycrystalline silicon content which is greater than or equal to about 90 weight percent of a total material of the polycrystalline silicon region, the transition comprising an amorphous silicon content and a polycrystalline silicon content, the transition region being defined as a region having both a lower amorphous silicon content than the essentially amorphous silicon region and a lower polycrystalline silicon content than the essentially polycrystalline silicon region, the transition region being at least 45 Angstroms thick.

Semiconductor processing methods of forming silicon layers

Disclosed is a process for forming, over a semiconductor substrate, a multilayer structure having successively a first layer of silicon-containing material, a relatively thin oxide layer, and a second layer of silicon-containing material. The oxide layer has a substantially uniform thickness in a range from about 1 Angstrom to about 20 Angstroms. The oxide layer consists essentially of silicon dioxide that is formed by exposing the first layer to an aqueous oxidizing bath at a relatively low temperature such that diffusion of dopants in the semiconductor substrate is not induced. The oxide layer prevents dopants from outgassing and diffusing out of the first layer and into the second layer. Also disclosed is a structure formed by the disclosed process.

Method of oxidizing a silicon surface

A wafer carrier for use in the transportation and storage of semiconductor wafers. More particularly, the invention is a wafer carrier having both a rigid structure and a corrosion resistant coating. The wafer carrier includes a unitary frame having several wafer supports joined by connecting members. The frame is coated with a material, such as a fluoropolymer, which is resistant to corrosive materials typically used in semiconductor fabrication processes.

Wafer carrier

Method of constructing a wafer carrier

In one aspect, the invention includes a semiconductor processing method comprising depositing a silicon layer over a substrate at different deposition temperatures which at least include increasing the deposition temperature through a range of from about 550.degree. C. to about 560.degree. C. In another aspect, the invention includes a semiconductor processing method comprising, in an uninterrupted deposition process, depositing a silicon layer which comprises an essentially amorphous silicon region, an essentially polycrystalline silicon region, and a transition region interconnecting the essentially amorphous silicon region and the essentially polycrystalline silicon region, the essentially amorphous silicon region having an amorphous silicon content which is greater than or equal to about 90 weight percent of a total material of the amorphous silicon region, the essentially polycrystalline silicon region having a polycrystalline silicon content which is greater than or equal to about 90 weight percent of a total material of the polycrystalline silicon region, the transition comprising an amorphous silicon content and a polycrystalline silicon content, the transition region being defined as a region having both a lower amorphous silicon content than the essentially amorphous silicon region and a lower polycrystalline silicon content than the essentially polycrystalline silicon region, the transition region being at least 45 Angstroms thick.

Amorphous silicon interconnect with multiple silicon layers

A tube for use in a thermal processing furnace. The tube comprises an elongated cylindrical tube having an inner surface with a plurality of dimples disposed thereon. In one preferred version of the invention, the dimples are formed as an integral part of the inner surface of the cylindrical tube. In another aspect of the invention, the dimpled furnace tube is incorporated into a thermal processing furnace. In this aspect of the invention, the furnace includes a furnace tube having an inner surface describing an elongated cylindrical heated chamber for receiving and processing a plurality of axially aligned spaced apart semiconductor wafers. The inner surface has a plurality of dimples disposed thereon. The furnace further includes an inlet for introducing reactant and/or inert gases into one end of the cylindrical chamber to flow axially within the chamber by the wafers and an outlet for removing the gases from the cylindrical chamber.

Dimpled thermal processing furnace and method for processing

Semiconductor structures and semiconductor processing methods of forming

Wafer carrier having both a rigid structure and resistance to corrosive

A method of making a wafer carrier for use in the transportation and storage of semiconductor wafers includes providing a unitary frame, forming a corrosion resistant coating, such as a fluoropolymer, covering the frame and providing wafer support elements mounted on the frame. A wafer carrier made by the present method may include a unitary frame having several wafer supports joined by connecting members. The frame is coated with a material, such as a fluoropolymer, which is resistant to corrosive materials typically used in semiconductor fabrication processes.

Growing community of inventors

Boise, ID, United States of America

Keith W Smith