Micron Technology Incorporated

Tektronix, Inc.

Other

Sunpower Corporation

Solarbridge Technologies, Inc.

Nvidia Corporation

Keith Robert Slavin

Shane C Hu

Ravindranath Naiknaware

Shane Ching-Feng Hu

Vincenzo DiTommaso

Gary Baker

Triet Tu Le

John J Ciardi

Robert Batten

Donald Craig

Systems and methods are provided for writing code to access data arrays. One aspect provides a method of accessing a memory array. Data is provided within a one-dimensional array of allocated memory. A dimensional dynamic overlay is declared from within a block of statements, and the declaration initializes various attributes within an array attribute storage object. The data is accessed from within the block of statements as a dimensional indexed array using the array attribute storage object. Another aspect provides a method of creating and accessing a dimensional dynamic array. A dimensional dynamic array is declared from within a block of statements, and memory storage for the array is dynamically allocated. A dynamic overlay storage object is also provided and its attributes are initialized from the dynamic array declaration. The data is accessed as a dimensional indexed array from within the block of statements using the array attribute storage object.

Dynamic arrays and overlays with bounds policies

A method includes generating samples of a grid parameter at a point of common coupling, fitting a waveform to the samples, and detecting an islanding condition in response to a parameter of the waveform. The waveform may be fit to the samples using a nonlinear algorithm. A controller includes a waveform fitting circuit to fit a waveform to samples of a grid parameter, an inverter controller to generate one or more switching signals to control an inverter in response to an error signal, and an error generator arranged to generate the error signal in response to a parameter of the waveform.

Power system islanding detection with waveform fitting

A method of operating a switching power converter may include determining an average value of a measured parameter for substantially each switching cycle, and adjusting a control parameter during substantially each switching cycle in response to a corresponding one of the average values. In one embodiment, the control parameter comprises a switch duty cycle, and the measured parameter comprises an output current. Determining the average value of the measured parameter may include obtaining a first sample of the measured parameter during a switching cycle, and calculating the average value of the measured parameter during the switching cycle in response to the first sample.

Switching power converter control

A method is comprised of inputting a comparand word to a plurality of hash circuits, each hash circuit being responsive to a different portion of the comparand word. The hash circuits output a hash signal which is used to enable or precharge portions of a CAM. The comparand word is also input to the CAM. The CAM compares the comparand word in the precharged portions of the CAM and outputs information responsive to the comparing step. When used to process Internet addresses, the information output may be port information or an index from which port information may be located. A circuit is also disclosed as is a method of initializing the circuit.

Low power, hash-content addressable memory architecture

A power converter may include a first power path having no energy storage and a second power path having substantial energy storage. The first and second power paths have first and second input waveforms that are complementary with respect to a source waveform. The first power path, which may be more efficient than the second path, may transfer as much power as possible from the input to the output. The energy storage enables the second power path to make up the difference between the power available from the source and the power drawn by the first power path, and to make up the difference between the power demanded by a load and the power supplied by the first path.

Parallel power converter topology

A comparand word is input to a plurality of hash circuits with each hash circuit responding to a different portion of the comparand word. The hash circuit outputs a hash signal which enables or pre-charges portions of a content addressable memory (CAM). The comparand word is also input to the CAM. The CAM compares the comparand word in the pre-charged portions of the CAM and outputs information responsive to the comparison. When Internet addresses are processed, the output information may be port information or an index for locating.

A rolling shutter digital camera. Each photographic image of a given exposure duration is captured as a multi-frame burst of frames each having a shorter exposure duration to minimize motion blur and to reduce sensor noise by averaging. Each frame is quantized into swaths, captured sequentially by the rolling shutter. Swaths of the first frames are analyzed to select a set of best motion detection reference regions. Swaths of subsequent frames are analyzed versus only those regions, to reduce required computation, and are re-registered accordingly. Corresponding swaths of each frame are accumulated. The accumulator is normalized to the desired bit depth and written as the final image. Averaging of the multiple frames is improved by re-registering swaths rather than entire frames, because of the time delta caused by the rolling shutter. Computation is further reduced by selecting candidate points only along a key line of each swath of the first frame, and still further by pre-limiting the search by using a thumbnail version of the first frame to cull most candidate points. Thresholds are used to ensure adequate motion detection regions are used for each swath.

Efficient method for reducing noise and blur in a composite still image from a rolling shutter camera

A power conversion system may include a controller to cause a power stage to control the flow of power to or from an energy storage device in response to a dynamic reference. The flow of power to or from the energy storage device may be controlled at a substantially higher speed than power fluctuations in a power source or load. In a power conversion system, a model including an energy storage device may be generated in real-time, and a condition of the energy storage device may be determined in response to the model.

Power conversion having energy storage with dynamic reference

A comparand word is input to a plurality of hash circuits, with each hash circuit responding to a different portion of the comparand word. The hash circuits output a hash signal which enables or precharges portions of a content addressable memory CAM. The comparand word is also input to the CAM. The CAM compares the comparand word in the precharged portions of the CAM and outputs information responsive to the comparison. When Internet addresses are processed, the output information is either port information or an index for locating port information.

Systems and methods are provided for caching dynamic arrays. According to one aspect, a cache memory device is provided for caching dynamic arrays or dynamic overlays. According to one embodiment, the device includes a plurality of memory cells and at least one register for storing access information to access at least one array stored in the plurality of memory cells. According to another aspect, an electronic system is provided that includes a main memory, a dynamic array cache memory device, a general cache memory device, and a processor. The dynamic array cache memory device is coupled to the main memory and adapted for caching array data. The general cache memory device is coupled to the main memory and is adapted for caching regular data. The processor is coupled to and adapted for communication with the main memory, the general cache memory device, and the dynamic array cache memory device.

Caching of dynamic arrays

A resampling circuit and method where input sample values for samples arranged along a row of a source image are received by a row resampling circuit. The row resampling circuit calculates row output values which are provided to a column resampling circuit that calculates output sample values therefrom. The column resampling circuit includes a shift register that receives the row output values and shifts the row output values through the shift register as the row output samples are calculated. The shift register has a plurality of evenly spaced sample output terminals from which the row output values are sampled by an interpolation circuit for calculation of the output sample values.

Graphics resampling system and method for use thereof

A linearity corrector is provided that reduces distortion in a signal processing system, such as an ADC. The linearity corrector provides a first order signal path having distortion components connected to an adder, and a filter product circuit that is also connected to the adder. A method is provided for reducing distortion by calculating a filter product and adding the filter product to a first order signal having a relative delay such that the filter product reduces, or eliminates, the order of distortions corresponding to the order of the filter product.

Growing community of inventors

Beaverton, OR, United States of America

Keith Robert Slavin