Interdigital Technology Corporation

Other

Intersil Americas Inc.

Intellectual Ventures I LLC

Conexant, Inc.

Harris Corporation

Adtran Gmbh

Globespan Virata Corporation

Xocyst Transfer Ag L.l.c.

Keith Richard Baldwin

Mark A Webster

Inhyok Cha

Eldad M Zeira

Richard D Roberts

John S Prentice

Alex C Yeh

Patrick J Landy

R Douglas Schultz

Yingxue K Li

George R Nelson

Albert L Garrett

Oldad Zeira

A method and apparatus for selecting an antenna mapping in multiple-in/multiple-out (MIMO) enabled wireless communication networks. A candidate set of currently available antenna mappings is determined based upon measured long term channel conditions. An antenna mapping is selected from the candidate set, and the mapping is calibrated with a selected antenna mapping of a receiving wireless transmit/receive unit (WTRU). When the selected mappings are calibrated, packet data transmission begins. In an alternative embodiment, a calibration training frame (CTF) is used to calibrate multiple antenna mappings simultaneously or sequentially. Also disclosed are physical layer and medium access control layer frame formats for implementing antenna mapping selection according to the invention.

Method and apparatus for antenna mapping selection in MIMO-OFDM wireless networks

A client station in a wireless local area network (WLAN) communication system includes a beam commutation algorithm and a smart antenna responsive to the beam commutation algorithm for selecting one of a plurality of directional antenna beams. The smart antenna is configured as a virtual omni-directional antenna by using a commutation of switched directional antenna beams. A switched directional antenna system that performs a commutation sequencing can be blind to environmental conditions and changes.

Methods for improving wireless communications when interference or signal loss is directional in nature

A decision directed flicker noise canceller for reducing flicker noise in a modulated input signal according to an embodiment of the present invention includes a decision circuit, a conversion circuit, first and second adders and a filter. The decision circuit provides signal decisions based on the input signal. The conversion circuit provides selected signal values based on the signal decisions. The first adder subtracts the selected signal values from signals based on the input signal to provide a flicker noise estimate. The filter receives and filters the flicker noise estimate and the second adder subtracts the filtered flicker noise estimate from the input signal and provides a corrected input signal. In a feedback configuration, the second adder is located in a feedback position before the decision circuit in the signal processing path. In a feed-forward configuration, the second adder is located in a feed-forward position after the decision circuit.

Decision directed flicker noise cancellation

A method of controlling operation of a wireless device configured in a zero intermediate frequency architecture including a DC loop and a gain loop. The method includes processing energy in a wireless medium to generate a corresponding receive signal, monitoring the receive signal via a predetermined measurement window, detecting a changed condition in the channel, holding the gain feedback control loop at a constant gain level, and operating the DC loop in an attempt to search a stable DC value for the receive signal while the gain loop is held constant. A first case is DC saturation, where the gain is held constant until DC is controlled. A second case is clear channel assessment, where a prior stored gain setting is applied to the gain loop after detecting the end of the packet. A third case is preparation for receiving an expected acknowledgement packet after transmitting a packet, where again a prior stored gain setting is applied to the gain loop and DC is searched.

Packet acquisition and channel tracking for a wireless communication device configured in a zero intermediate frequency architecture

A wireless receiver including a baseband processor that includes a compensation system that selectively includes an equalizer and a CMF that process received digital samples from a wireless medium, and a CIR estimator that calculates filter weights based on the samples. A memory stores default filter weights and select logic selects between calculated filter weights of the CIR estimator and the default filter weights from the memory. An SNR estimator receives the samples and provides an SNR metric and a multipath estimator receives the calculated filter weights and provides a multipath metric. The decision logic determines an operating point of the receiver using the SNR and multipath metrics, makes a decision based on the determined operating point according to a predetermined packet error rate (PER) performance mapping, and controls the select logic to select between the default and calculated filter weights and selectively enables the equalizer.

Intelligent control system and method for compensation application in a wireless communications system

A calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency (ZIF) architecture. The device includes a ZIF transceiver and a baseband processor, which further includes a calibrator that periodically performs a calibration procedure. The baseband processor includes gain control logic, DC control logic, a gain converter and the calibrator. The gain converter converts gain between the gain control logic and the DC control logic. The calibrator programs the gain converter with values determined during the calibration procedure. The gain converter may be a lookup table that stores gain conversion values based on measured gain of a baseband gain amplifier of the ZIF transceiver. The gain control logic may further include a gain adjust limiter that limits change of a gain adjust signal during operation based on a maximum limit or on one or more gain change limits. A second lookup table stores a plurality of DC adjust values, which are added during operation to further reduce DC offset. The calibration procedure includes sampling an output signal for each gain step of the baseband amplifier at two predetermined range values and corresponding DC offsets using successive approximation. The data is used to calculate gain, DC offset and DC differential values, which are used to determine the conversion values programmed into the lookup tables or the gain adjust limiter.

Calibrated DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture

An RF device including a control loop for maximizing output power for each of several data rates or constellation types. The RF device includes a power detector, a power amplifier and a MAC that includes input and output adjust circuits. A power level value is generated from measured output power. The MAC compares an adjusted power level value with a set point value and generates an error value. The MAC adjusts a power control value based on the error value for controlling the gain of the power amplifier. The MAC uses a data rate signal indicative of a selected constellation type or data rate. The input adjust circuit stores one or more input adjustment values selected by the data select signal for adjusting the power level value. The output adjust circuit stores one or more output adjustment values selected by the data select signal for adjusting the power control value.

Transmit power control for multiple rate wireless communications

A threshold detector for detecting synchronization signals at correlator output during packet acquisition. An RF receiver converts RF signals into baseband signals. A matched filter correlator correlates samples of the baseband signals with predetermined synchronization signals, such as long sync symbols, and provides corresponding correlation samples. A long-term integrator integrates a first predetermined number of the correlation samples to provide a long term moving average and a short term integrator integrates a second predetermined number of the correlation samples to provide a short term moving average signal. The short term moving average signal is based on channel delay spread and the long term moving average tracks channel noise. A multiplier multiplies the long term moving average signal by a scale factor to generate a dynamic threshold. A detector detects a crossover between the short term moving average and the dynamic threshold to estimate timing of received synchronization signals.

Threshold detector for detecting synchronization signals at correlator output during packet acquisition

A channel estimator for use with the wireless digital data receiver facilitates processing of a preamble symbol sequence received over a multipath communication channel to enable the impulse response of the channel to be rapidly estimated, and thereby set the parameters of the receiver's decision feedback equalizer. During the preamble dwell interval, selected estimates of one or more received preamble symbols within a plurality of successive data symbols are repeated, in order to generate a longer sequence of preamble symbol estimates. The receiver's processor then employs this longer sequence of data symbol values, to solve an associated set of linear equations for estimating the multipath channel's impulse response.

Rapid estimation of wireless channel impulse response

A wireless communication device including a radio frequency (RF) circuit, a ZIF transceiver and a baseband processor. The ZIF transceiver includes an RF mixer circuit that converts the RF signal to a baseband input signal, a summing junction that subtracts a DC offset from the baseband input signal to provide an adjusted baseband input signal, and a baseband amplifier that receives the adjusted baseband input signal and that asserts an amplified input signal based on a gain adjust signal. The baseband processor includes gain control logic, DC control logic and a gain interface. The gain control logic receives the amplified input signal, estimates input signal power and asserts the gain adjust signal in an attempt to keep the input signal power at a target power level. The DC control logic estimates an amount of DC in the amplified input signal and provides the DC offset in an attempt to reduce DC in the amplified input signal. The gain interface converts gain levels between the gain control logic and the DC control logic. The RF signal may include in-phase (I) and quadrature (Q) portions, where the RF mixer circuit splits I and Q baseband input signals from the RF signal. Operation is substantially identical for both I and Q channels. The DC control logic operates to remove or otherwise eliminate DC from the received signal that is provided to decoders in the baseband processor.

DC compensation system for a wireless communication device configured in a zero intermediate frequency architecture

An apparatus for blind signal separation and equalization of PAM signals on a full duplex transmission line is capable of successfully extracting and recovering the respective signalling components of a full-duplex wireline digital data link without having to disturb the link during its use (e.g. as by interrupting service to sever the link in order to install a line coupling device, such as a modem or attenuator pad to signal monitoring equipment) and without having to generate PN or other training sequences. A full-duplex wireline bridge device comprises a signal characteristic monitoring device that is capable of monitoring the link and providing respective output signals representative of the respective unidirectional signal components being transmitted simultaneously in opposite directions along the link. A directional signal separator, comprised of a voltage probe and a current probe, each of which can be coupled to the link without severing the link or otherwise disrupting ongoing communications, couples the signal characteristic monitoring device to the link. The signal processing device is operative to controllably combine the outputs of the voltage and current probes and provides respective output signals that are representative of the desired unidirectional signal components. The communications link may be either a single wire transmission line or a two wire balanced transmission line. In the latter instance individual probes of pairs of voltage and current probes are coupled to respective portions of the two wire balanced transmission line.

Blind signal separation and equalization of full-duplex amplitude

A wireline bridge tap device and an associated signal processing mechanism are capable of successfully extracting and recovering the respective signalling components of a full-duplex wireline digital data link without having to disturb the link during its use (e.g. as by interrupting service to sever the link in order to install a line coupling device, such as a modem or attenuator pad to signal monitoring equipment). The full-duplex wireline bridge device comprises a signal characteristic monitoring device that is capable of monitoring the link and providing respective output signals representative of the respective unidirectional signal components being transmitted simultaneously in opposite directions along the link. A directional signal separator, comprised of a voltage probe and a current probe, each of which can be coupled to the link without severing the link or otherwise disrupting ongoing communications, couples the signal characteristic monitoring device to the link. The signal processing device is operative to controllably combine the outputs of the voltage and current probes and provides respective output signals that are representative of the desired unidirectional signal components. The communications link may be either a single wire transmission line or a two wire balanced transmission line. In the latter instance individual probes of pairs of voltage and current probes are coupled to respective portions of the two wire balanced transmission line.

Growing community of inventors

Melbourne Beach, FL, United States of America

Keith Richard Baldwin