Globitech Incorporated

Mos Epi, Inc.

Keith Lindberg

Danny Kenny

Danny Kenney

G R Mohan Rao

Curtis Hall

The present invention is directed to a built-in solution for soft error protection by forming an epitaxial layer with a graded dopant concentration. By grading a dopant concentration, starting from a first dopant concentration and ending with a second dopant concentration at the device layer, usually determined by the characteristics of the device to be built in the device layer, a constant electric field (&#x3b5;-field) results from the changing dopant concentration. The creation of this &#x3b5;-field influences the stray, unwanted charges (or transient charges) away from critical device components. Charges that are created in the epitaxial layer are sweep downward, toward, and sometimes into, the substrate where they are absorbed, thus unable to cause a soft error in the device. The graded layer may be formed over the substrate and at a started dopant concentration different then that in the substrate itself, thereby further influencing the character of the electric field by creating a thin, but rather intense &#x3b5;-field at the interface junction between the epitaxial layer and the substrate. A graded epitaxial layer may also be used in conjunction with a P+ substrate by interposing an intrinsic layer between the device layer and the substrate. An even higher reduction is soft error rates are with P&#x2212; substrates in which a buried n-layer is formed between the substrate and the intrinsic layer. The addition of the n-layer causes a pair of additional electric fields to be created at the junction interfaces between the substrate and the intrinsic layer.

System and method for reducing soft error rate utilizing customized epitaxial layers

A method for reducing microsteps on an epitaxial layer deposited on a polished semiconductor wafer substrate by post-epitaxial thermal oxidation. The method produces very smooth semiconductor wafers by performing the steps of depositing an epitaxial layer on a wafer substrate, oxidizing a top portion of the expitaxial layer, and removing the oxidized top portion. As a result, the wafer's surface presents little or no microsteps thereon.

Post-epitaxial thermal oxidation for reducing microsteps on polished semiconductor wafers

A method for reducing microsteps on an epitaxial layer deposited on a polished semiconductor wafer substrate by post-epitaxial thermal oxidation. The method produces very smooth semiconductor wafers by performing the steps of depositing an epitaxial layer on a wafer substrate, oxidizing a top portion of the epitaxial layer, and removing the oxidized top portion. As a result, the wafer's surface presents little or no microsteps thereon.

A system and method for monitoring a process flow of a semiconductor wafer. In one embodiment, the method initially calculates a first location of the wafer before it is processed. The wafer is then moved into a process chamber where it is processed. Then a second location of the wafer is calculated before the wafer is unloaded. If the difference between the first and second locations are within a predetermined amount, the wafer is unloaded and regular processing steps proceed. If the difference is not within the predetermined amount, an alarm is activated and the process is stopped.

Differential process control method

A system and method for handling post epitaxial thermal oxidation. The method produces semiconductor wafers by performing the steps of forming a wafer substrate, depositing an epilayer on the substrate, oxidizing a top portion of the epilayer, and removing the oxidized top portion. As a result, the wafer's surface is very smooth, with little or no micro-steps thereon.

Post epitaxial thermal oxidation

The present invention provides a system and method for calibrating pressure sensors associated with chambers in a processing facility. The system calibrates the pressure sensors while the chamber are open to each other, such as through an open slit valve or vacuum sealed door. Maintaining the pressure in the chambers relative to each other prevents a rush of gases, condensate or other foreign materials into an adjacent chamber that may occur when the pressure between the chambers is not equalized. This prevents contamination of the materials being processed, and eliminates the need for system shut-down to calibrate sensors. Also, since calibration occurs every time the slit valve is open, the calibration is real-time and does not allow the pressure differential between the chambers to become too great.

Automatic reference-pressure balance method

A system and method for using solid-phase water scrub to remove defects from a wafer surface is disclosed. The method includes the steps of placing the wafer proximate to a frozen substrate and moving the wafer relative to the frozen substrate, thereby causing a portion of the frozen substrate to liquefy. As a result, defects are effectively removed from the wafer's surface.

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Sherman, TX, United States of America

Keith Lindberg