Lsi Logic Corporation

Sun Microsystems, Inc.

Raychem Limited

Keith G Newman

Brett C Ong

Sadanand R Patil

Adrian S Murphy

An apparatus and method for non-destructive solder interconnect integrity monitoring that can detect existing fracture damage, identify new or incipient fractures, and be implemented across multiple component configurations. Said components can be implemented to detect, on a continuous basis, solder interconnect fractures as they occur during actual end-use, throughout the lifecycle of monitored components, rather than relying on a one-time electrical check prior to shipment.

Solder interconnect integrity monitor

A printed circuit board (PCB) having an integrated strain gage. In one embodiment, a PCB includes a component footprint suitable for mounting an electronic component. A strain gage is integrated into the PCB in a location under the component footprint. The strain gage includes at least one electrical conductor that is accessible for resistance measurements.

Integrated strain gages for board strain characterization

The present invention is a method for solder joint integrity assessment. The invention comprises collecting data from one or more solder joint strain tests and characterizing the solder joint data integrity using a force-deflection graph. A force-deflection graph characterizes the response force of a solder joint to applied strain as a function of time. One embodiment of the invention uses the slope of the graph to characterize the integrity of the solder joint. Another embodiment uses the area below the graph to characterize the integrity of the solder joint. To generate the force-deflection graph, the invention applies one or more tests to the solder joint. In one embodiment, a shear test is applied to the solder joint. In another embodiment, a cold pull test is applied to the solder joint. In another embodiment, a hot pull test is applied to the solder joint.

Method and apparatus for solder joint integrity assessment

An integrated circuit package, as well as a method for fabricating the same, is herein disclosed. The integrated circuit package of the present invention includes a cavity located within an assembly of laminated printed wiring boards. Such cavity provides two or more bonding tiers for connection with a semiconductor die. The contact pads are further connected, through conductive vias, to external connection means such as solder balls or pins. The semiconductor die is encapsulated with a molding compound through a transfer molding process. The present invention is especially advantageous in manufacturing pin grid array ('PGA') and ball grid array ('BGA')integrated circuit packages.

Method of making integrated circuit package having multiple bonding tiers

A novel lid for sealing an encapsulant within a cavity of an integrated circuit package is disclosed herein. A ring is formed around a cavity opening, where a semiconductor die is located in an integrated circuit package. A lid, having a radially extending potion biased toward the die, is adapted to engage the cavity opening. According to one embodiment of the invention, a dam ring is disposed on the top surface of an integrated circuit package so as to form the cavity opening. A radially extending potion of the lid is adapted to engage the inner or outer surface of the ring so as to retain the lid in close communication with the cavity opening and seal the encapsulant within the cavity. Alternatively, the lid can be adapted to engage the cavity opening as existing in the top surface of an integrated circuit package. The present invention is especially advantageous in conjunction with ball grid array ('BGA') packages and pin grid array ('PGA') type IC packages.

Integrated circuit package lid

An apparatus and method for controlling unwanted spread of adhesive used to attach a semiconductor integrated circuit die to an integrated circuit package assembly. A barrier prevents the adhesive from spreading onto bond finger connections of the integrated circuit package. The barrier may be a solder mask ring outside of and encircling the perimeter of the die attachment area of the package assembly. The barrier is located between the die attachment area and the adjacent bond fingers of the package.

Method and apparatus for controlling adhesive spreading when attaching

A method and system for producing a plurality of integrated circuit packages having heat spreaders attached thereto. A planar metal sheet having predefined openings allows the addition of discrete bypass capacitors to the integrated circuit package. The planar metal sheet laminates to a plurality of laminated printed wiring boards. The metal sheet is then cut into sections resulting in individual packages. Each package has a cavity in which an integrated circuit die is placed therein. The integrated circuit die is in close thermal communication with the heat spreader of the package and connects to the conductive paths of the printed wiring boards. The invention is especially advantageous in manufacturing in quantity plastic pin grid array (PPGA) and plastic ball grid array (PBGA) integrated circuit packages.

Method and system for fabricating IC packages from laminated boards and

A metallic or ceramic dam structure surrounding a semiconductor die in a semiconductor device assembly is disclosed. The dam structure forms a cavity containing a potting compound encapsulating the die. The dam structure may also be provided with a flat lid portion, enclosing the cavity and forming a flat, exterior, heat-dissipating surface for the semiconductor device assembly. Further, an additional add-on structure, having heat dissipating fins, may be joined to the dam structure, exterior the semiconductor device assembly, to provide additional heat dissipation. The add-on structure is particularly well-suited to applications where air cooling is available.

Integral dam and heat sink for semiconductor device assembly

A flexible and rugged laminar heater in which a non-woven cloth layer serves to reduce air void formation during lmaination. The heater of the invention comprises a laminar conductive polymer heating element, at least two electrodes, at least one polymeric insulating layer and at least one nonwoven cloth layer. Suitable nonwoven cloths may comprise nylon or glass. In addition to eliminating air voids, they are useful in minimizing distortion of the laminate.

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Sunnyvale, CA, United States of America

Keith G Newman