Motorola Corporation

Freescale Semiconductor,inc.

Keith Brankner

David M Schraub

Lloyd C Litt

Charles F King

Systems and methods are described for translating detected wafer defect coordinates to reticle coordinates using CAD data. A wafer inspection image is provided and coordinates of potential defects in the wafer are determined. Then the wafer inspection image is converted into a predetermined image format. CAD data for the device under test is then used to produce a second image, also in the predetermined image format. The CAD-derived image and the wafer-derived image are then aligned, and the coordinates of potential defects in the wafer are converted into CAD coordinates. The CAD coordinates are then used to navigate through the reticle for the wafer in order to locate reticle defects corresponding to the detected wafer defects.

Method and apparatus for translating detected wafer defect coordinates to reticle coordinates using CAD data

A method ( ) to manufacture semiconductor reticles associated with a design uses an optical pattern correction (OPC) test pattern ( ) in a first reticle frame and having subresolution features that will not resolve or appear on a resulting wafer. A first reticle is made ( ) and critical parameters are extracted from the first reticle ( ). The critical parameters are used to execute an OPC model ( ) to generate a modified design. A production reticle is made from the modified design. The OPC test pattern is placed in a second reticle frame and a second reticle is manufactured. Critical parameters from the second reticle are compared with the critical parameters from the first reticle and must be within a predetermined tolerance or the reticle build process is modified until the tolerance is reached.

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Austin, TX, United States of America

Keith Brankner