Tektronix, Inc.

Keith A Taylor

Ira G Pollock

Barton T Hickman

William Q Law

Michael S Hagen

Wendell W Damm

Murlan R Kaufman

Marvin E LaVoie

Pedro Max Janowitz

Marvin E La Voie

Doug Haines

Felicia L Taylor

Brian E Rhodefer

Brian E Rhoderfer

Object locator device

A measurement test instrument voltage management system for an accessory device has a accessory device interface that provides a voltage to a memory device in the accessory device. A sensing circuit receives a sensing signal from the accessory device when it is connected to the interface. The sensing circuit generates an interrupt signal that is coupled to a controller. The controller initiates the generation of a clock signal that is coupled to the accessory device through the interface to retrieve accessory device data stored in the device memory. The controller determines if the connected accessory device is a valid device capable of being supported by the measurement test instrument. The controller generates an enable signal for a valid and supported device that is coupled to a voltage switching circuit. The voltage switching circuit generates at least a first output voltage that is coupled to the accessory device via the interface to provide power to the accessory device.

Measurement test instrument and associated voltage management system for accessory device

A user interface for a tester or simulator includes a menu for creating templates. The templates organize a set of the user's decisions regarding the timing, direction, and masking of all of the signals occurring during one tester cycle into a convenient form for use in another menu where test vectors are actually specified. In this other menu, the templates serve as a shorthand way of describing the function of each channel and its timing characteristics during one tester cycle. Thus, these templates organize and simplify the user's decision making, since many decisions, that would otherwise have to be made again and again, may now be made only once and then incorporated again and again by reference to the appropriate template. The use of the templates also conserves total memory requirements. The template menu can provide visual feedback that includes timing diagrams and icons to assist the user in constructing the template.

Test vector definition system employing template concept

A multiple digital event generator produces events with timing that is programmable, yet the event generator requires a minimum of circuitry for its construction and is capable of operating at very high speeds. A linear feedback shift register is used to produce an arbitrary sequence of non-repeating binary numbers. These numbers are then monitored by one or more digital comparators whose other digital input is chosen so as to cause the desired event to occur when a certain number in the number sequence occurs. The minimum time between events and the maximum range of event control timing is adjustable by varying the frequency of the clock input to the linear feedback shift register. Maximum speed is achieved by using one set of the shift register flip-flop outputs (Q or Q-not) for internal feedback and the other set (Q-not or Q) for the output to the digital comparators, so that the speed of operation of the shift register is not degraded by the load of the multiple digital comparator circuits on its output.

Programmable digital multiple event generator

A pin driver circuit for driving a digital integrated circuit is capable of producing symmetrical rise and fall characteristics, yet is suitable for implementation in monolithic bipolar integrated circuits. This circuit includes a pair of matched transconductance amplifiers, one at each end of an output resistor, connected between a voltage source and a return voltage. Each amplifier has one of a pair of equal resistors between its input terminal and high output terminal to develop an equal swing voltage on alternate ends of the output resistor when a swing voltage current source is switched between the two input resistors by a control signal. The output is taken from the junction between the output resistor and the low output terminal of the amplifier at the high end of the output resistor. An additional current source is connected to the input resistor of the amplifier at the low end of the divider to provide a current which may be adjusted to allow the standing current in the output resistor to be reduced to a satisfactory minimum. Additional circuitry can be added to allow the output to be put in a high impedance condition. In a preferred embodiment, the high level of the output, the swing voltage, and the standing current may all be controlled.

Pin driver circuit

A differential signal input is applied through two resistors to the two sides of a dual clamping circuit and the two current outputs of a current mirror. The dual clamping circuit prevents the voltage on either output of the current mirror from going above some reference value in response to the imbalance created by the differential input signal. With one side, the high side, of the differential signal output held to this reference value by the operation of the clamping transistor on that side, the whole voltage imbalance on the input appears on the other output as a result of the operation of the current mirror. Thus, the reference level of the differential signal is shifted at the output, while the amplitude of the signal is preserved. Alternative embodiments substitute a dual clamping circuit with an opposite polarity or an averaging circuit for the dual clamping circuit described, thereby referencing the output signal to the low side or an average instead of the high side as in the preferred embodiment.

Differential level shifter employing current mirror

Color shadow mask cathode ray tubes

A glitch detector for use in a sampled data acquisition system is disclosed. Glitch detection is provided by a flip-flop which is set on a first signal transition, conditioning a logic gate, the output of which changes logic states on a second signal transition. Two such glitch detectors operatively associated with complementary data signals permits detection of either positive-going or negative-going glitches within a sample clock period. A glitch indication flip-flop is reset by a glitch detection signal, providing a glitch indication signal to an output terminal via a latch. Control and reset circuits are provided to facilitate glitch detection on every cycle of the sample clock, and at any point within a sample clock period.

Glitch detector

An electronic circuit is disclosed which passes current to an output node when the rate of change of voltage on an input node exceeds a predetermined value. A differentiating network is serially disposed between a voltage-driven source and a normally cut off common base amplifier to monitor the rate of change of the voltage signal. The common base amplifier is prebiased to conduct when the output of the differentiator exceeds the threshold value. The circuit may include temperature compensation means and adjustable prebiasing means. When a pair of such circuits are utilized in a differential or push-pull mode, the displacement current in the pair of capacitors has a serial conduction path for rates of change of input voltage below the threshold value, and a parallel conduction path above the threshold value.

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Portland, OR, United States of America

Keith A Taylor