Ricoh Company, Ltd.

Keitaro Ado

Isamu Moriwaki

Nobuaki Tsunashima

Yasunori Nakayama

A card access apparatus is provided that is adapted to be connected to plural types of cards, the apparatus including plural connection points adapted for the respective types of cards, and plural signal buses that connect the connection points to a card control unit. When one type of card is connected to its corresponding connection point, at least one signal bus connected to a connection point adapted for at least one other type of card is electrically isolated from its corresponding connection point.

Card access apparatus and electronic apparatus implementing the same

A network interface is provided, in which it has an active mode and at least one of a disconnect mode and a suspend mode, and performs a predetermined process when a release condition of the disconnect mode or the suspend mode is satisfied. The network interface includes a driving control circuit for stopping at least a part of driving clock generation circuits included in the network interface until the release condition of the disconnect mode or the suspend mode is satisfied from the time when the disconnect mode or the suspend mode is established, wherein the driving control circuit operates irrespective of a clock signal.

Network interface for decreasing power consumption

A data processing apparatus of an optical disk drive includes a buffer memory which has a page area divided into a plurality of pages, each page having a predetermined size and containing a main data, a subcode and an error code within the page, each page corresponding to one sector of digital data produced by the disk drive with respect to a compact digital disk, an address of each page of the buffer memory being specified by a page number. A buffer management unit accesses data of a particular page of the buffer memory in response to an input address, the input address specifying a starting address of the data of the particular page of the buffer memory. A system control unit having a page register generates the input address by combining a page number stored by the page register with a predetermined offset, and supplies the input address to the buffer management unit when the data of the buffer memory is accessed, the offset being determined in accordance with the data to be accessed, the page number specifying a starting address of the particular page of the buffer memory, the offset specifying a location of the data to be accessed in the particular page relative to the starting address.

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Hyogo, Japan

Keitaro Ado