Sony Semiconductor Solutions Corporation

Keita Izumi

Katsumi Takaoka

Toshimasa Shimizu

Katsuyuki Tanaka

Naoki Yoshimochi

Yasushi Katayama

Hideki Takahashi

Hideki Awata

Suguru Houchi

Sotaro Ohara

Yutaka Takagi

Gaku Hidai

It is desirable to reduce power consumption without reducing a function in an electronic apparatus operating in a plurality of modes different in power consumption from one another. A processor operates in a normal mode, in which power consumption is higher, of two modes different in power consumption from each other, and stops operation in a power saving mode, in which the power consumption is lower, of the two modes. A control section outputs a power saving mode control command instructing an increase or decrease of a supply electric power to a digital circuit different from the processor in the power saving mode. A power source managing integrated circuit increases or decreases the supply electric power to the digital circuit in accordance with the power saving mode control command, and outputs the increased or decreased supply electric power.

Electronic apparatus and method of controlling electronic apparatus

The present disclosure relates to a signal processing apparatus and method that enables to reduce required power. In the signal processing apparatus, a RTC of a main chip and a RTC of a power supply chip are synchronized before power supply of the main chip is stopped, and the RTC of the main chip is synchronized with the time of the RTC of the power supply chip after the power supply of the main chip is restored. In this way, the RTC uses continuous time information before and after the stop. The present disclosure is capable of being applied to, for example, a GPS module in which a digital circuit includes a plurality of chips.

Signal processing apparatus and method

Growing community of inventors

Kanagawa, Japan

Keita Izumi