Oki Semiconductor Co., Ltd.

Keisuke Oosawa

Masaru Seto

Hideyuki Ando

Masayuki Masukawa

A method that suppresses etching damage without increasing a chip area of a semiconductor device. An integrated circuit including a MOS transistor is formed in a device area, and a discharge diffusion region is formed in a device area, and a discharge diffusion region is formed in a grid area. The discharge diffusion region is connected to a metal wiring of the integrated circuit via a contact hole. Therefore, when the metal wiring is formed by a dry etching method, an electric charge stored in the metal wiring is discharged to a semiconductor substrate through the discharge diffusion region. Thus, etching damage of the MOS transistor is reduced. Since the discharge diffusion region and the contact hole are formed within the grid area, they are cut off by a dicing process, thus causing no increase in chip area of the semiconductor device.

Process of manufacturing semiconductor device

Separate first and second floating gates for attracting carriers transferring in a transistor structure having a channel region and first and second main electrode regions into charge storage films therebelow are formed so as to largely face a control gate. The control gate between the separate first and second floating gates faces to the channel region via thin interlayer insulating layer. Therefore, a semiconductor device according to the present invention can inject electrons the charge storage film without causing writing errors in a writing operation, and therefore can increase in reliability thereof, control a writing voltage, prevent loss of the electrons stored in the charge storage film, and reliably apply a bias voltage to a channel region.

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Miyagi, Japan

Keisuke Oosawa