Panasonic Intellectual Property Management Co., Ltd.

Panasonic Corporation

Keiko Ikuta

Norihito Tsukahara

Toshiyuki Kojima

Takayuki Hirose

Kohichi Tanda

Tsukasa Shiraishi

Masayoshi Koyama

Lianji Jin

A semiconductor device () includes: a semiconductor chip () having a first main surface and a second main surface opposite to the first main surface; a heat dissipating plate () opposed to the first main surface; a first electrode () disposed between the first main surface and the heat dissipating plate () so as to be electrically connected to the semiconductor chip (); a pressure contact member () opposed to the second main surface; a second electrode () disposed between the second main surface and the pressure contact member () so as to be electrically connected to the semiconductor chip (); and a pressure generating mechanism that generates a pressure for pressing the first electrode () into contact with the heat dissipating plate () and the semiconductor chip () and pressing the second electrode () into contact with the pressure contact member () and the semiconductor chip ().

Semiconductor device and method for manufacturing the same

A pressed-contact type semiconductor device includes a power semiconductor element, on an upper surface of which at least a first electrode is formed and on a lower surface of which at least a second electrode is formed, lead frames which face the first electrode and the second electrode of the power semiconductor element respectively, and a clip which applies a pressure to the lead frames while the power semiconductor element is sandwiched by the lead frames, wherein a metallic porous plating part is formed on a surface which faces the first electrode or the second electrode, the surface being a surface of at least one of the lead frames.

Pressed-contact type semiconductor device and method for manufacturing the same

A semiconductor device which can reduce a heat stress to a solder layer while suppressing an increase of thermal resistance is provided. A semiconductor device includes a semiconductor element, a solder layer which is arranged on at least one surface of the semiconductor element and a lead frame which is arranged on the solder layer so that a porous nickel plating part is sandwiched between the lead frame and the solder layer. Compared with a case that the semiconductor element and the lead frame are jointed by a solder directly, an increased part of a thermal resistance of the solder junction is held down only to a part of the porous nickel plating part and a thermal resistance applied to the solder layer can be reduced.

Semiconductor device having a porous nickel plating part

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Osaka, Japan

Keiko Ikuta