Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Keiji Miki

Yoshifumi Nakamura

Nozomi Shimoishizaka

Ryuichi Sahara

Kazumi Watase

Kazuyuki Kaino

Yasutake Yaguchi

Kazuyuki Kainou

Toshiyuki Fukuda

Isamu Aokura

Yukitoshi Ota

A semiconductor waferhas a plurality of semiconductor chip areasand a scribe area, each of the semiconductor chip areashaving semiconductor elements and electrode pads (electrode portions)electrically connected to the respective semiconductor elements, the scribe areahaving monitor elements and electrode pads (electrode portions)electrically connected to the monitor elements, wherein projecting electrodesare selectively formed only on the respective electrode padsin the semiconductor chip areasby electroless plating. Thus, for example, the electrode padsare covered with an insulating film

Semiconductor chip

Semiconductor wafer

A semiconductor device in accordance with the present invention includes IC chips (semiconductor elements) () having solder bumps () (projecting electrodes) formed on electrode pads, and a first wiring board () having connection terminals () to which the respective solder bumps () of the IC chips () are connected, external connection terminals () for connection to an external apparatus, and conductor wires () provided in respective groove portions formed in a board surface and connected to the respective connection terminals (). In spite of the reduced pitch of the conductor wires (), the presence of the groove portions enables an increase in cross section, allowing a reduction in wiring resistance.

Semiconductor device having recessed connector portions

A semiconductor device has a semiconductor chip, a first insulating film and an inductor. The semiconductor chip includes an integrated circuit formed on the main surface of the chip and a plurality of pad electrodes formed on the main surface of the chip and electrically connected to the integrated circuit. The first insulating film of an insulating resin material is formed on the main surface of the semiconductor chip, covers the integrated circuit, and includes a plurality of contact holes provided on the respective pad electrodes. The inductor is formed on the inductor formation region of the first insulating film, and both terminals of the inductor are connected to the pad electrodes through the contact holes, respectively. The inductor formation region of the first insulating film is formed thicker than a portion of the first insulating film around the contact hole.

Method for fabricating a chip-scale-packaging (CSP) having an inductor

The semiconductor device includes a semiconductor element having an electrode formed on a surface thereof, and a metal wiring formed on the surface of the semiconductor element and electrically connected to the electrode. The metal wiring has an external electrode portion functioning as an external electrode. A thickness of the external electrode portion is greater than that of a non-electrode portion of the metal wiring, i.e., a portion of the metal wiring other than the external electrode portion.

Semiconductor device including a diffusion layer

Semiconductor device having an inductor formed on a region of an insulating film

Semiconductor device including a diffusion layer formed between electrode portions

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Kyoto, Japan

Keiji Miki