Kabushiki Kaisha Toshiba

Toshiba Infrastructure Systems & Solutions Corporation

Softard Industries Co., Ltd.

Toshiba Infrastructure Systems & Solutions Cirporation

Keiichi Yamaguchi

Atsushi Yamaoka

Hiroyuki Kayano

Yoshimasa Egashira

Yuta Araki

Takayuki Kato

Naoko Ono

Makoto Tanahashi

Yuji Iseki

Thomas Martin Hone

Hiroshi Yoshida

Shinya Murai

Masataka Goto

Kotaro Ise

Takuya Kawamura

Yuuki Funahashi

Kazuhiko Itaya

Takashi Kawakubo

Takashi Yamamoto

Kazuhide Abe

Kazuhiro Inoue

Ichiro Seto

Takaaki Yasumoto

Ryoichi Ohara

Akihiro Tsujimura

Tomoya Horiguchi

Kenya Sano

Nobuyuki Itoh

Tazuko Tomioka

Tadahiro Sasaki

Naoko Yanase

Mayumi Morizuka

Ryuichi Fujimoto

Yasushi Murakami

Katsuhiko Kawakami

Noriaki Odachi

Takaya Kitahara

Mitsuo Konno

Hiroaki Ikeuchi

Eiji Takagi

Koichiro Gomi

Tomomi Aoki

Masayuki Kidokoro

Tomokazu Yanokuchi

Tooru Kozu

Takeshi Ookubo

Shu-ichi Sekine

Takayoshi Itoh

Junko Onomura

Yoshimasa Kimoto

An electronic apparatus according to one embodiment, includes: a signal generator generating a first signal and a second signal; a first characteristic circuitry acquiring first and second distorted signals by giving first and second distortion characteristic to the first and second signals; a first time-characteristic circuitry acquiring a third distorted signal by giving a first time-characteristic to the first distorted signal and acquiring a fourth distorted signal by giving a second time-characteristic to the second distorted signal; a second characteristic circuitry acquiring a fifth distorted signal by giving a second distortion characteristic to the third distorted signal, and acquiring a sixth distorted signal by giving the second distortion characteristic to the fourth distorted signal; and a processing circuitry estimating at least one of the first distortion characteristic and the second distortion characteristic based on the first signal, the second signal, the fifth distorted signal, and the sixth distorted signal.

Electronic apparatus and signal processing method

According to one embodiment, a circuit element includes a silicon substrate, a lower electrode, a dielectric film, and an upper electrode. The lower electrode is formed on a major surface of the silicon substrate by a doping process. The dielectric film is formed on the lower electrode. The upper electrode is formed on the dielectric film. The upper electrode includes a slit.

Circuit element

A radio frequency circuit has an amplifier that amplifies an input radio frequency signal, a power supply path that is disposed between an output node of the amplifier and a power supply node to which a DC bias voltage is supplied, and includes a first inductor and a second inductor connected in series, a first resonator that comprises a third inductor and a first capacitor connected in series to the third inductor, and resonates at a series resonance frequency, a second resonator that resonates at a series resonance frequency corresponding to an inductance of the first inductor, a capacitance of the second capacitor, and a resistance value of the first resistor, and a third resonator that comprises a third capacitor connected in parallel with the second inductor, and resonates at a parallel resonance frequency corresponding to a capacitance of the third capacitor and an inductance of the second inductor.

Radio frequency circuit

An object to be achieved by an embodiment of the present invention is to provide a radar apparatus, a signal processing apparatus, and a method that reduce interference caused to a reception signal by a transmission signal during transmission of a signal. To achieve the above object, a radar apparatus of an embodiment includes: a transmitter configured to transmit a pulse signal; a receiver configured to receive a reception signal including a first signal as the pulse signal reflected by an observation target and an interference signal provided in accordance with the pulse signal; and a processor configured to generate a separated signal in which the reception signal is, on a time axis, separated into a first component corresponding to the first signal and an interference component corresponding to the interference signal by using a first reference signal generated based on the pulse signal and reduce the interference component.

Electronic apparatus, and method

An amplification apparatus as the embodiment of the present invention includes a switching amplifier and an adjuster. The switching amplifier is driven on the basis of a control signal and amplifies an input signal to be amplified to generate an amplified signal. The adjuster adjusts at least one of the signal to be amplified and the control signal before being input into the switching amplifier. In addition, the adjuster adjusts so that timing when the control signal turns from LOW to HIGH aligns with timing when the signal to be amplified turns from LOW to HIGH, or aligns with timing when the signal to be amplified turns from HIGH to LOW.

Amplification apparatus and transmission apparatus

An amplification apparatus as the embodiment of the present invention includes a switching amplifier and an adjuster. The switching amplifier is driven on the basis of a control signal and amplifies an input signal to be amplified to generate an amplified signal. The adjuster adjusts the control signal before it is inputted into the switching amplifier. Specifically, the adjuster adjusts at least one of a pulse width of the control signal and a delay time of the control signal with respect to the signal to be amplified.

According to one embodiment, an amplifier circuit includes N (N&#x3e;=3) transistors, two first branches and N&#x2212;2 second branches. The N (N&#x3e;=3) transistors are connected in parallel. The two first branches each include the transistor and a first transmission line which is connected to an output terminal of the transistor. The N&#x2212;2 second branches each include the transistor and a second transmission line which is connected to the output terminal of the transistor. For each of the first branches, a sum between an electrical length of a parasitic component of the transistor and the electrical length of the first transmission line are odd multiples of approximately 90 degrees. For each of the second branches, the sum between the electrical length of the parasitic component of the transistor and the electrical length of the second transmission line are multiples of approximately 180 degrees.

Amplifier circuit and transmitting device

An amplifier has an N number of input networks connected to an input terminal to receive an input signal, a first amplifier to amplify one output signal from the N number of input networks, a (N&#x2212;1) number of secondary amplifiers to amplify the remaining (N&#x2212;1) number of output signals, except for the one output signal, from the N number of input networks, where the amplification order of the (N&#x2212;1) number of secondary amplifiers is determined based on the power level of each output signal from the N number of input networks when the first amplifier is operational, an N number of output networks which are arranged, and a first bias network to supply a D.C. bias voltage to at least one of the N number of output networks. An electrical length of the first bias network is less than 90 degrees.

Amplifier and transmitter

A signal processing device capable of performing a process of reducing peak power without interfering with a transmission signal at a high speed is provided. A signal processing device includes a peak-reduced signal generating device and a band pass filter. The peak-reduced signal generating device divides an input signal having an information component into signal streams for every predetermined number of signals, and generates peak-reduced signal with peak canceling signals on the basis of the signal streams. The peak-reduced signal generating device combines the signal streams which the peak-reduced signals on the basis of an order in which the division into the signal streams has been performed. The band pass filter passes a frequency component corresponding to the information component and rejects a frequency component corresponding to the peak canceling signal with respect to a signal based on a signal from the peak-reduced signal generating device.

Signal processing device

A modulated signal generating device that modulates an input signal and generates a modulated signal. The modulated signal generating device includes a first to p-th amplifier, where p=3 to N, and N represents an integer equal to or greater than three, a first to p-th control unit, a first to p&#x2212;1-th filter, and a combiner. The first amplifier generates a first amplified signal based on a first control signal. The first control unit generates the first control signal based on a first component signal included in the input signal. The first filter eliminates harmonic component included in a first difference signal representing difference between the input signal and the first component signal, and generates a first filtered signal. The combiner combines the first to a p-th amplified signal to generate the modulated signal.

Modulated signal generating device and wireless device

According an embodiment, a Doherty amplifier includes a carrier amplifier, a peak amplifier, a first line and a second line. The carrier amplifier amplifies a signal and outputs a first output signal. The peak amplifier amplifies the signal and outputs a second output signal. The first line is connected to the carrier amplifier. The second line includes a first end connected to the peak amplifier and a second end connected to the first line. A characteristic impedance of the first end is lower than a characteristic impedance of the second end.

Doherty amplifier

According to one embodiment, an amplifier includes: a transistor; a ground circuit connected to a ground terminal of the transistor; a first capacitor connected between an output terminal of the transistor and the ground circuit; a first inductor connected to the output terminal of the transistor; a second capacitor connected between the first inductor and the ground circuit; a bias circuit connected between the first inductor and the ground circuit; a first circuit connected to the output terminal of the transistor, the first circuit including a second inductor and a third capacitor connected in series to the second inductor; a fourth capacitor connected between the first circuit and a load circuit; a fifth capacitor connected between an output terminal of the first circuit and the ground circuit; and a third inductor connected between a terminal on a load circuit side of the fourth capacitor and the ground circuit.

Amplifier

According to an embodiment, the modulated signal generating device modulates an input signal and generates an output signal. The modulated signal generating device includes a plurality of amplifiers, a combiner, a determining unit and a control signal generating unit. The plurality of amplifiers connects in parallel with one another and each configures to drive based on a control signal and to generate amplified signals. The combiner configures to combine the amplified signals and to obtain the output signal having a stepwise waveform. The determining unit configures to determine number of amplifiers to be driven based on a value of the input signal in a period shorter than a period of the input signal. The control signal generating unit configures to select zero or more amplifiers to be driven from among the amplifiers, based on the number of amplifiers determined by the determining unit, the value of the input signal, and a fluctuation in the value of the input signal, and to generate the control signal for driving the selected amplifier.

An amplifying device of an embodiment includes: a first amplifier amplifying a first component of an input signal; a first output circuit having an input connected to an output of the first amplifier and converting impedance seen from an output of the first output circuit to make the converted impedance seen from the first amplifier; a second amplifier amplifying a second component of the input signal with a bias deeper than that of the first amplifier; a second output circuit having an input connected to an output of the second amplifier, having a longer electrical length than that of the first output circuit part, and converting impedance seen from an output of the second output circuit to make the converted impedance seen from the second amplifier; and a combiner combining the first component amplified by the first amplifier and the second component amplified by the second amplifier.

Amplifying device, transmitting device

Growing community of inventors

Kawasaki, Japan

Keiichi Yamaguchi