Nec Corporation

Bristol-myers Company

Bristol-myers Squibb Compnay

Nimura Genetic Solutions Co., Ltd.

Forest Research Institute Malaysia

Keiichi Numata

Masahisa Oka

Tadashi Maeda

Yuji Takahashi

Masataka Konishi

Noriaki Matsuno

Shinichi Kondo

Seiji Shibahara

Hitoshi Yano

Masahiro Fujii

Yasuo Ohno

Hironobu Iinuma

Tomoyuki Yamase

Nobuhide Yoshida

Takao Atsumo

Kunimoto Hotta

Satoshi Nimura

Noriyuki Okujo

Siew Eim Khor

Lee Li Tan

Annie George

Szu Ting Ng

Chin Jye Tan

Yasuo Fukagawa

Seven novel antibiotic substances can be produced by cultivation of a microbial strain which has been isolated from a soil sample and which is designated assp. A 34030 (deposited under an access number FERM BP-10505 in terms of Budapest Treaty). These seven antibiotic substances are named as bispolide A1, bispolide A2, bispolide A3, bispolide B1, bispolide B2a, bispolide B2b and bispolide B3, respectively. These bispolides are each novel compounds which have a chemical structure as collectively represented by the general formula (III) shown below:  These bispolides have each a high antibacterial activity against a variety of bacteria, particularly Gram-positive bacteria and their antibiotic-resistant strains, and hence these bispolides each are effective and useful for therapeutically treating bacterial infections of Gram-positive bacteria in humans and animals.

Antibiotics, bispolides A1, A2, and A3 as well as bispolides B1, B2a, B2b and B3 and processes for producing said antibiotics

A high-frequency switch circuit includes: a switch section comprised of a field effect transistor having a plurality of bias circuits and a potential generating circuit for generating bias voltages from a control signal and supplying them to the bias circuits. The field effect transistor forms the passage route of a high-frequency signal by turning on and off in accordance with the control signal. The bias circuits are provided to produce a potential difference between the drain terminal and the source terminal of the field effect transistor and to apply bias voltages lower than the voltage of the control signal to the drain terminal, and the source terminal.

Switch circuit for high frequency signals wherein distortion of the signals are suppressed

A high-frequency switch circuit has a plurality of high-frequency switches for passing and blocking a high-frequency signal between an input terminal and an output terminal depending on a control potential applied as a control signal, a high-frequency detecting terminal for detecting high-frequency signal passing through the high-frequency switch which is in ON-state, and a voltage boosting circuit for generating a potential for increasing the control potential applied to the high-frequency switch which is in ON-state in order to increase difference between the control potential applied to the high-frequency switch which is in an ON-state and the control potential applied to the high-frequency switch which is in an OFF-state, depending on an intensity or amplitude of the detected high-frequency signal.

High frequency switch circuit

The present invention provides an amplifying circuit capable of accomplishing high-impedance input/output, and providing a high gain and low power consumption. The amplifier amplifies a signal received through an input terminal, and outputs the signal through an output terminal. A control circuit comprised of the inductors, and the switches turns input/output impedances of the amplifier into a high impedance.

Amplifying circuit

A PLL circuit comprises a phase comparator for comparing phases between a reference signal and an internal signal and outputting a phase difference signal according to a phase difference therebetween, a voltage controlled oscillator group composed of a plurality of oscillators which have mutually different frequency variable ranges and whose oscillation frequencies are respectively controlled in accordance with a phase control signal, a selecting means for selecting one of the outputs from the plurality of oscillators based on the phase difference signal or the phase control signal, and a frequency divider for generating the internal signal by dividing an output of an oscillator selected by the selecting means, and when the oscillator selecting state is changed, an output phase of the frequency divider is approximated to the phase of the reference signal. Thereby, a required voltage controlled oscillator can be selected in a short time according to a desirable oscillation frequency.

PLL circuit

A high frequency switch circuit including high frequency terminals which input/output a high frequency signal, high frequency semiconductor switch sections which are arranged on lines coupling the high frequency terminals, a DC potential isolating circuit which isolates the plurality of high frequency semiconductors switch sections from each other in a DC state, and DC potential transmission sections. Each DC potential transmission section couples a control side of an associated high frequency semiconductor switching section to at least one of an input side and an output side of another one of the plurality of high frequency semiconductor switch sections.

There is disclosed a field effect transistor logic circuit having an output terminal to be connected to a gate of an input field effect transistor in a next stage field effect transistor logic circuit. The field effect transistor logic circuit includes a depletion transistor having a drain connected to a first power supply voltage, an enhancement transistor having a drain connected at a node in common to a gate and a source of the depletion transistor. A gate of the enhancement transistor is connected to an input terminal, and a source of the enhancement transistor is connected to a second power supply voltage which is lower than the first power supply voltage. A high level potential limiting circuit is connected between the node and the output terminal, to lower a potential of the output terminal to a level which turns on a drain-source channel of the input field effect transistor of the next stage field effect transistor logic circuit but which never turns on a gate-source of the input field effect transistor of the next stage field effect transistor logic circuit, when the potential of the node is at a high level. A lower level lowering circuit having an input connected to the input terminal, is also connected between the output terminal and the second power supply voltage, for pulling down the potential of the output terminal to the potential of the second power supply voltage when the potential on the node is at a low level.

Field effect transistor logic circuit with reduced power consumption

In a switching speed fluctuation detecting apparatus, an input terminal for receiving a signal having a definite time period, a series arrangement of at least one first logic circuit connected to the input terminal, a second logic circuit having a first input connected to the input terminal and a second input connected to an output of the series arrangement and an integrator connected to an output of the second logic circuit are provided.

Switching speed fluctuation detecting apparatus for logic circuit

Glidobactin PF-1 of the formula ##STR1## having antitumor activity is prepared by cultivation of Polyangium brachysporum in a nutient medium containing a suitable fatty acid ester, such linolenate, together with other assimilable sources of carbon and nitrogen.

Glidobactin PF-1 peptide antibiotics

Semi-synthetic derivatives of the BU-2867T antibiotics are disclosed. These derivatives are active against experimental mammalian tumors, and may be prepared from enzymatic degradation product(s) of BU-2867T A.

Semi-synthetic peptide antibiotics

Semi-synthetic derivatives of the BU-2867T antibotics are disclosed. These derivatives are active against experimental mammalian tumors, and may be prepared from enzymatic degradation product(s) of BU-2867T A.

Growing community of inventors

Tokyo, Japan

Keiichi Numata