Renesas Electronics Corporation

Honda Motor Co., Ltd.

Hitachi Astemo Ltd.

Keiichi Maekawa

Eiji Tsukuda

Kota Funayama

Kenichiro Sonoda

Takumi Hasegawa

Yasuhiro Takeda

Kazutoshi Shiba

Yoshiki Maruyama

Shuichi Kudo

Hiroshi Uozaki

Yoshiki Yamamoto

Shinichiro Abe

Hideki Kato

Hideki Makiyama

Shiro Kamohara

Yasushi Yamagata

Hideaki Yamakoshi

Tetsuya Yoshida

Yuto Omizu

Atsushi Murakami

Shinji Kasatori

Kenji Nagaoka

Toshihiro Ogawa

Hirokatsu Kameda

Kentaro Tokita

The invention relates to a method for manufacturing a coil spring and for determining a propelling condition for a shot medium. In a case where it is confirmed that the coating film remains in a third step, at least one or more of conditions of the shot peening treatment including a propelling speed of the shot medium, a propelling time of the shot medium, a material of the shot medium, and an average particle diameter of the shot medium are changed and the second step and the third step are repeated until the coating film does not remain. In a case where it is confirmed that the coating film does not remain in the third step, the condition of the shot peening treatment in the second step in which the coil spring is obtained with no remaining coating film is determined as the propelling condition for the shot medium.

Method for determining propelling condition for shot medium, and method for manufacturing coil spring

To improve reliability of a semiconductor device, in a method of manufacturing the semiconductor device, a ground plane region of an n-type MISFET is formed by ion-implanting a p-type impurity and nitrogen (N) and a ground plane region of a p-type MISFET is formed by ion-implanting an n-type impurity and one of carbon (C) and fluorine (F).

Method of manufacturing semiconductor device

A semiconductor device is provided that is capable of reducing the possibility of change in state of memory elements formed over a semiconductor substrate with an insulating layer interposed therebetween. The semiconductor device includes nonvolatile memory elements and a bias circuit. Each of the nonvolatile memory elements includes a drain region and a source region arranged so as to sandwich a semiconductor region where a channel is formed, a gate electrode, and a charge storage layer arranged between the gate electrode and the semiconductor region. The nonvolatile memory elements are arranged over the semiconductor substrate with the insulating layer interposed therebetween. When electrons are stored in the charge storage layer, the bias circuit reduces the potential difference between the gate electrode and at least one of the drain region and source region in order to decrease holes stored in the channel of a nonvolatile memory element.

Semiconductor device

To make a gate insulating film of a selecting transistor coupled in series to a MONOS memory transistor thinner and to ensure insulation resistance of the gate insulating film, the selecting transistor and the memory transistor, which constitute a memory cell, are formed on an SOI substrate, and an extension region of the selecting transistor is formed to be away from a selecting gate electrode in a plan view. A drain region of the selecting transistor and a source region of the memory transistor share the same semiconductor region with each other.

Semiconductor device including transistors formed in regions of semiconductor substrate and operation method of the same

To provide a semiconductor device equipped with anti-fuse memory cells, which is capable of improving read-out accuracy of information. There is provided a semiconductor device in which an N channel type memory transistor, a selection core transistor, and a selection bulk transistor are respectively electrically coupled in series. The memory transistor and the selection core transistor are formed in a silicon layer of an SOI substrate, and the selection bulk transistor is formed in a semiconductor substrate. A word line is coupled to a memory gate electrode of the memory transistor, and a bit line is coupled to the selection bulk transistor. A write-in operation is performed while applying a counter voltage opposite in polarity to a voltage applied from the word line to the memory gate electrode to the bit line.

Semiconductor device and manufacturing method thereof

An object is to provide a semiconductor device having improved reliability by preventing, in forming a nonvolatile memory and MOSFETS on the same substrate, an increase in the size of grains in a gate electrode. The object can be achieved by forming the control gate electrode of the nonvolatile memory and the gate electrodes of the other MOSFETs from films of the same layer, respectively, and configuring each of the control gate electrode and the gate electrodes from a stack of two polysilicon film layers.

Method of manufacturing semiconductor device and semiconductor device

Growing community of inventors

Tokyo, Japan

Keiichi Maekawa