Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Nuvoton Technology Corporation Japan

Keiichi Fujii

Taku Kobayashi

Hitoshi Kobayashi

Takuma Ishida

Toshinobu Nagasawa

Yu Okada

Makoto Yamamoto

Kazuo Matsukawa

Tetsushi Toyooka

Yasunobu Kakumoto

Yosuke Goto

Satoshi Azuhata

Yoshikazu Makabe

Takeshi Misaku

A battery monitoring device includes: a pair of terminals for measuring voltage or current of a battery, and to which a filter unit including a capacitive element is connected; an AD converter that measures a waveform of voltage between the terminals during charging or discharging of the capacitive element; and a time constant calculation unit that calculates a time constant of the filter unit based on the waveform measured. The AD converter is, for example, a first AD converter or a second AD converter. The filter unit is, for example, a first filter unit or a second filter unit.

Integrated circuit, battery monitoring device, and battery monitoring system

A battery management circuit includes: a reference signal generator that generates a first reference frequency signal and a second reference frequency signal having a phase different from a phase of the first reference frequency signal; an alternating-current superimposer that superimposes an alternating current on the secondary battery, the alternating current having a frequency component of the first reference frequency signal; a voltage measurer that measures a voltage of the secondary battery by performing sampling using a frequency; a current measurer that measures a current of the secondary battery by performing sampling using a frequency; and a converter that converts each of results of measurements by the voltage measurer and the current measurer into a complex voltage and a complex current, by multiplying the result of the measurement by the first reference frequency signal and the second reference frequency signal.

Battery management circuit, battery management system, and battery management network

A battery monitoring device includes a first reference resistor disposed in a path different from a path of current flowing from a battery to a load; a transistor for passing current from the battery to the first reference resistor; and an integrated circuit. The integrated circuit includes: a current measurement unit that measures a first current flowing through the first reference resistor; a voltage measurement unit that measures a first voltage of the battery; and a first calculation unit that calculates an AC impedance of the battery based on the first current measured and the first voltage measured.

Battery monitoring device, integrated circuit, and battery monitoring system

A muting circuit of the present invention includes: an input terminal that receives a control signal for allowing switching between ON and OFF of a mute operation; and a muting transistor connected to the input terminal and an output terminal of the amplifier. The muting transistor is a MOS transistor, and a gate is connected to the input terminal, a drain is connected to the output terminal of the amplifier, and a source is grounded. Consequently, a shot noise due to a DC difference caused when a mute state is switched between ON and OFF can be suppressed.

Muting circuit and semiconductor integrated circuit

The present invention detects whether the supply voltage applied to the power supply terminal () is used for the dynamic speaker or for the piezoelectric speaker by the power supply voltage detection circuit (), switches the gain of the amplifier circuit () in accordance with the detection result by the gain switching circuit () so that the same output power is produced for the same input signal in the respective speaker driving, and amplifies the input signal from the input terminal () by the amplifier circuit () having the gain to drive a speaker () that is connected to the output terminals ().

Speaker driving device and audio output system

A plurality of transistors are connected between an IC bus operating at a first voltage level and an IC bus operating at a second voltage level and a main control electrode of at least one transistor is connected to a first power supply terminal and a main control electrode of the other at least one transistor is connected to an intermediate level between the first voltage level and the second voltage level, whereby a withstand voltage required to a transistor of the bidirectional level shift circuit of the IC bus can be lowered.

Bidirectional level shift circuit and bidirectional bus system

A semiconductor integrated circuit that suppresses steep changes of an output voltage when starting of a charge pump circuit to suppress transient displacement of output of a circuit block operating independently of the charge pump circuit is provided. A semiconductor integrated circuit has: a charge pump circuit which charges a first capacitor with an input voltage, transfers a charge accumulated in the first capacitor to a second capacitor, outputs, as an output voltage, a voltage of the second capacitor, and is capable of changing over a capability of charging the second capacitor; a first circuit block that receives a positive voltage and a grounding potential; and a second circuit block that receives the positive voltage and the output voltage of the charge pump. The semiconductor integrated circuit suppresses the charging capability by the charge pump circuit when starting of the charge pump circuit.

Semiconductor integrated circuit including charge pump circuit

A semiconductor integrated circuit includes a charge pump circuit that repeats charge and discharge of a capacitor based on a clock signal when an ON/OFF control voltage is ON; a first delay circuit that delays the ON/OFF control voltage; a switch that shorts an output of the charge pump circuit and a GND input terminal when the delayed ON/OFF control voltage is OFF and opens when the delayed ON/OFF control voltage is ON; a first circuit block that is driven by a power voltage which is supplied from a power source input terminal and the charge pump circuit; and a second circuit block that is driven by a power voltage which is supplied from the power source input terminal and the GND input terminal. The first and second circuit blocks are mounted on the same semiconductor integrated circuit chip.

Semiconductor integrated circuit for processing audio and video signals

While a charge pump activation/deactivation control circuit is outputting a high level signal, MOS transistors for short-circuiting a flying capacitor are off, and the charge pump circuit operates normally. When the charge pump activation/deactivation control circuit outputs a low level signal, the MOS transistors for short-circuiting the flying capacitor are turned on, and the charge pump circuit is deactivated. Consequently, the voltages at the terminals of the flying capacitor are the same and the charge charged therein is discharged. Therefore, when the charge pump circuit is activated again, the initial amount of charge charged to the flying capacitor is zero. Consequently, no large current flows through an output capacitor in the first discharging cycle after the re-activation.

Charge pump circuit

In a BTL amplifier of the present invention, between first and third transistor parts which are laterally adjacent, directions of semiconductor regions are parallel. Between the first and second transistor parts and the third and fourth transistor parts, each which are longitudinally adjacent, directions of semiconductor regions are perpendicular. The first and the third transistor parts are connected to a power supply terminal through a first wire. The second and the fourth transistor parts are connected to a ground terminal through a second wire. The first and the second transistor parts are connected to a first output terminal through a third wire. The third and the fourth transistor parts are connected to a second output terminal through a fourth wire.

BTL amplifier

A step-down voltage output circuit preventing: latch-up phenomenon in a load circuit for a period between a power-supply activation and complete start of a charge pump circuit; and rapid change of a substrate potential when a step-down voltage output is changed from ON to OFF. The step-down voltage output circuit has a timer circuit that operates depending on control signals and a timer period; a first N-channel MOS transistor in which a source is connected to a step-down voltage output terminal, a drain is connected to ground, a gate is connected to a power-supply voltage input terminal through a resistance; and a second N-channel MOS transistor in which a source is connected to the step-down voltage output terminal, a drain is connected to the gate of the first N-channel MOS transistor, and a gate is connected to an output terminal of the timer circuit.

Step-down voltage output circuit

To provide a step-down voltage output circuit which causes no latch-up phenomenon for the period between activation of a power supply and complete start of operation of a charge pump circuit. The step-down voltage output circuit of the present invention has the charge pump circuit with a first oscillator; a timer circuit in which a timer period is set according to an oscillating frequency of the above-mentioned first oscillator; and an N-channel MOS transistor in which one N-type diffusion layer is connected to an output terminal of the above-mentioned charge pump circuit, the other N-type diffusion layer is connected to ground potential, and a gate electrode is connected to an output terminal of the above-mentioned timer circuit to become conductive for the above-mentioned timer period.

An AGC circuit of the present invention includes a first up/down counter for converting the amount of change in an output voltage higher than a threshold voltage into a count value and controlling a gain of a variable gain amplifier circuit and a second up/down counter to which a reference clock having a lower frequency than that of a reference clock supplied to the first up/down counter is supplied. Count values of the first and second up/down counters are D/A-converted and then compared with each other by a voltage comparator. An up/down count of the first up/down counter is controlled based on a comparison result and the gain of the variable gain amplifier circuit is controlled using only a signal based on the count value of the first up/down counter, thereby suppressing distortion of an output waveform and the generation of a frequency signal which is not originally input.

AGC circuit

An AGC circuit, which does not require any signal integration circuit comprised of a capacitor and a resistor, is provided. To achieve the above object, when amplifying or attenuating input signal by a variable gain control circuit controlled by the gain control voltage, output signal of the variable gain amplifier circuit is rectified by a rectification circuit, the output signal of the rectification circuit is compared to an arbitrary set voltage by a voltage comparator. The up-count operation and the down-count operation of the up/down counter is controlled to changeover by the output signal of the voltage comparator, and a voltage corresponding to the count value of the up/down counter is output from the D/A conversion circuit. Thus, gain control voltage corresponding to the voltage output from the D/A conversion circuit is supplied to the variable gain amplifier circuit.

A rectified analog input signal is compared with a threshold voltage by a voltage comparator, and counting direction of an up/down counter is switched based on the comparison result, and a latch circuit retains an output of the up/down counter, and then an analog-digital converting circuit converts an output of the latch signal into a direct-current voltage. In addition, two input terminals, to which a clock for up-count operation and a clock for down-count operation are independently provided, is provided in the up/down counter, and a timing pulse generating circuit for determining reset timing of the up/down counting circuit and latch timing of the latch circuit is provided.

Growing community of inventors

Kusatsu, Japan

Keiichi Fujii