Fujitsu Corporation

Fujitsu Microelectronics Limited

Keigo Nakashima

Kazufumi Komura

Keiichi Fujimura

Takayoshi Nakamura

Masahito Hirose

Masaki Nagato

A semiconductor integrated circuit device provided with a plurality of power supply wire layers including a first potential power supply wire and a second potential power supply wire formed in different layers. At least one capacitor contact wire extends from one of the first and second potential power supply wires toward the other one of the first and second potential power supply wires so as to form a capacitor between each capacitor contact wire and its surrounding wires.

Semiconductor integrated circuit device

A power consumption reduction circuit for reducing power consumed by a clock tree network including a transmission control circuit. The power consumption reduction circuit includes a transmission control circuit for controlling transmission of the clock signal to the buffer circuit group so as to selectively provide and interrupt the clock signal. A switch circuit disconnects the buffer circuit group from a power supply when the transmission control circuit interrupts the clock signal.

Power consumption reduction circuit for clock network

Growing community of inventors

Kasugai, Japan

Keigo Nakashima