Hitachi, Ltd.

Kei Nakajima

Hiroyasu Nishiyama

Koichi Okada

Motoki Obata

Takuma Nagase

Naonobu Sukegawa

Takashi Nishikado

Hiroyuki Kumazaki

Masahiko Adachi

Masakazu Fukagawa

Akihiro Nakaya

Yoshihiro Itou

Memory management by garbage collection involves a memory area that is allocated in a computer. Data is created in the memory area in accordance with a program executed by a processor of the computer, and it is checked whether or not data necessary to execute the program exists in the memory area to be released, in response to an explicit instruction to release the memory area. As a result of the check, if data necessary to execute the program does not exist in the memory area, the memory area is released. As a result of the check, if data necessary to execute the program exists in the memory area, the data is moved to a memory area different from the memory area to be released.

Memory management method and computer using the method

The present invention provides a memory management method, including the steps of: securing a memory area by a program executed by a computer; storing an object in the memory area in accordance with the execution of the program; bringing the memory area into a release reservation state in accordance with the program instructing the memory area to be released; moving the object to a memory area not to be released while another object in the memory area not to be released and not to be brought into the release reservation state refers to the object in the memory area to be released including the memory area to be brought into the release reservation state; and releasing the memory area to be released.

Memory management method and computer using the same

A synchronous reference code indicative of the fact that synchronous updating was made is provided to data which is to be applied to a critical section, and the code is set when synchronous updating is made. After a sentence in the critical section is executed, it is confirmed whether or not the synchronous updating of the data was made. In a thread for synchronous reference, reference is made, it is confirmed whether or not synchronous updating was made, and then the correctness of the updating is confirmed. When the synchronous updating is not made, the execution of the critical section is completed. Thereby the simultaneous execution of the critical sections and reduction of an overhead are realized.

Method for executing plural programs, method for converting source programs and compiler program using these methods

Unnecessary barrier instructions are dynamically reduced in a parallel processing object program, program module or object code section to be parallel processed in a multiprocessor system by a compiler that generates the parallel processing object program from a source program. The compiler divides the source program into parallel processing objects, issues a pre dynamic barrier instruction having parameters for barrier necessity determination that describe a first variable or array memory reference in the parallel processing object, which includes a parallel processing loop. In addition, the compiler issues a post dynamic barrier instruction having information in parameters about a second variable or array (or group of arrays) to be referenced after the parallel processing object. A dynamic barrier executing device uses a hardware system for checking for a data dependency between the first and second variable or array references to reduce unnecessary barrier instructions based on the parameters of the pre and post dynamic barrier instructions.

Method of reducing unnecessary barrier instructions

Multiple parallel-job scheduling method and apparatus are provided which can improve the utilization of all processors in a system when a plurality of parallel jobs are executed concurrently. A plurality of processors constituting a computer system and each having the equal function are logically categorized into serial processors for executing a serial computing part or a parallel computing part of a parallel job and a parallel processor group consisting of multiple processors for executing the parallel computing part of the parallel job in parallel. In order that the parallel processors are shared by a plurality of parallel jobs, a synchronization range indicator is provided which can control by program whether the parallel processors are available in correspondence to the respective serial processors. In response to a request for using the parallel processors from a serial processor for which the parallel processors are so set as to be available by means of the synchronization range indicator, operation can be carried out without invoking an interrupt.

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Chigasaki, Japan

Kei Nakajima