The Hong Kong University of Science and Technology

Nano and Advanced Materials Institute Limited

Kei May Lau

Zhaojun Liu

Jing Chen

Chik Patrick Yue

Wing Cheung Chong

Chi Wing Keung

Yong Cai

Xu Zhang

Johnny Kin On Sin

Wai Keung Cho

Chak Wah Tang

Yu Han

Chu Hong Wang

Longheng Qi

Peian Li

Renqiang Zhu

A full-color LED micro-display having a plurality of pixels is disclosed. Each pixel includes a first LED comprising a blue/green dual wavelength LED structure for emitting blue light; a second LED comprising the blue/green dual wavelength LED structure for emitting green light; and a third LED comprising a monochrome red LED structure for emitting red light. The blue/green dual wavelength LED structure includes a dual wavelength MQWs active region of a first material with two emission peaks. The dual wavelength MQWs active region includes a first quantum well stack, a second quantum well stack, and a third quantum well stack. The first and the third quantum well stack are configured for generating the blue light, and the second quantum well stack is configured for generating the green light. The monochrome red LED structure further comprises a red emitting MQWs active region of a second material with a second emission peak.

Full-color light-emitting diode micro-display and the fabrication method thereof

GaN vertical trench MOSFETs and methods of manufacturing the same are disclosed. One example embodiment is a vertical trench MOSFET. The MOSFET includes a semiconductor transistor that has a first surface and a second surface, and a trench that extends from the first surface into the semiconductor transistor along a first direction perpendicular to the first and second surfaces. The semiconductor transistor includes a body region having a channel region arranged along the first direction along at least a portion of a wall of the trench. The doping concentration of the channel region is non-uniform. As a non-limiting example, two-step doping is conducted for forming asymmetric or non-uniform channel of a GaN vertical trench MOSFET. In some embodiments, multiple-step doping other than the two-step doing (such as doping in three steps, four steps, or more), linearly scaled doping, other proper asymmetric doping can be used.

GaN vertical trench MOSFETs and methods of manufacturing the same

The present disclosure relates to a method for growing III-V compound semiconductors on silicon-on-insulators. Starting from {111}-oriented Si seed surfaces between a buried oxide layer and a patterned mask layer, the III-V compound semiconductor is grown within lateral trenches by metal organic chemical vapor deposition such that the non-defective portion of the III-V compound semiconductor formed on the buried oxide layer is substantially free of crystalline defects and has high crystalline quality.

Method for growing III-V compound semiconductor thin films on silicon-on-insulators

The present disclosure relates to a monolithic full-color light-emitting diode (LED) display panel. The display panel includes a plurality of pixels and each pixel includes a first LED for emitting light having a first primary color, a second LED for emitting light having a second primary color, a third LED for emitting light having the first primary color, and a color converting layer for converting light generated by the third LED into light having a third primary color. Since the first, second and third LEDs of each pixel are formed with the same multi-layer semiconductor structure, the fabrication process of the display panel can be substantially simplified resulting in higher yield, increased throughput and lower cost.

Monolithic full-color light-emitting diode display panel

A passive-matrix light-emitting diodes on silicon (LEDoS) micro-display is presented herein. The LEDoS micro-display comprises a passive-matrix micro-light-emitting diode (LED) array comprising passive-matrix micro-light-emitting diodes (LEDs), and a display driver configured to apply column signals to columns of LED pixels of the passive-matrix micro-LED array and scan signals to rows of the LED pixels, wherein the passive-matrix micro-LED array is flip-chip bonded to the display driver based on solder bumps located at peripheral areas of the passive-matrix micro-LED array.

Passive-matrix light-emitting diodes on silicon micro-display

Techniques are provided for forming a gallium nitride flip-chip light-emitting diode. In an aspect, a device is provided that includes a gallium nitride layer, a passivation layer, a set of first conductive layers, and a second conductive layer. The gallium nitride layer is formed on a substrate that includes a first plurality of recesses associated with a first structure and a second plurality of recesses associated with a second structure, where the first plurality of recesses and the second plurality of recesses are associated with a first conductive material. The set of first conductive layers is formed on the passivation layer and corresponds to the first conductive material. The second conductive layer is formed on the passivation layer and corresponds to a second conductive material.

Gallium nitride flip-chip light emitting diode

A lighting device is provided. The lighting device includes a substrate, integrated circuits (), embedded passive components (), and a lighting component (), the device being arranged in an architecture having three layers: an integrated circuits layer () including the integrated circuits (), wherein the integrated circuits layer () is integrated on a first side of the substrate; an embedded passive components layer () including the embedded passive components (), wherein the embedded passive components () are embedded in grooves formed in the substrate and wherein the embedded passive components are connected to the integrated circuits () through vias () in the substrate; and a bonded layer (), including the lighting component (), the lighting component () being connected to the integrated circuit layer () through flip-chip bonding or monolithic integration.

Power system-on-chip architecture

Image projection utilizing light-emitting diodes on a silicon (LEDoS) substrate is described herein. LEDoS devices selectively activate LED pixels to produce light. Light can excite color conversion materials of the LEDoS devices to form color images. Images can be projected onto a projection surface.

LEDoS projection system

A high-resolution, Active Matrix (AM) programmed monolithic Light Emitting Diode (LED) micro-array is fabricated using flip-chip technology. The fabrication process includes fabrications of an LED micro-array and an AM panel, and combining the resulting LED micro-array and AM panel using the flip-chip technology. The LED micro-array is grown and fabricated on a sapphire substrate and the AM panel can be fabricated using CMOS process. LED pixels in a same row share a common N-bus line that is connected to the ground of AM panel while p-electrodes of the LED pixels are electrically separated such that each p-electrode is independently connected to an output of drive circuits mounted on the AM panel. The LED micro-array is flip-chip bonded to the AM panel so that the AM panel controls the LED pixels individually and the LED pixels exhibit excellent emission uniformity. According to this constitution, incompatibility between the LED process and the CMOS process can be eliminated.

Method for manufacturing a monolithic LED micro-display on an active matrix panel using flip-chip technology

A III-V semiconductor device on a silicon substrate is constructed with a silicon (Si) substrate onto which gallium arsenide (GaAs) indium phosphide (InP) and aluminum indium arsenide (AlInAs) to form a structure of AlInAs over InP over GaAs over Si. The GaAs is applied in at least one layer over the Si, followed by at least one layer of InP and at least one layer of AlInAs. A portion of the structure is doped and a cap or passivation layer is applied.

Metamorphic growth of III-V semiconductor on silicon substrate by MOCVD for high speed III-V transistors

A high-resolution, Active Matrix (AM) programmed monolithic Light Emitting Diode (LED) micro-array is fabricated using flip-chip technology. The fabrication process includes fabrications of an LED micro-array and an AM panel, and combining the resulting LED micro-array and AM panel using the flip-chip technology. The LED micro-array is grown and fabricated on a sapphire substrate and the AM panel can be fabricated using PMOS process, NMOS process, or CMOS process. LED pixels in a same row share a common N-bus line that is connected to the ground of AM panel while p-electrodes of the LED pixels are electrically separated such that each p-electrode is independently connected to an output of drive circuits mounted on the AM panel. The LED micro-array is flip-chip bonded to the AM panel so that the AM panel controls the LED pixels individually and the LED pixels exhibit excellent emission uniformity. According to this constitution, incompatibility between the LED process and the PMOS/NMOS/CMOS process can be eliminated.

Monolithic full-color LED micro-display on an Active Matrix panel manufactured using flip-chip technology

Monolithic full-color LED micro-display on an active matrix panel manufactured using flip-chip technology

Method for manufacturing a monolithic LED micro-display on an active matrix panel using flip-chip technology and display apparatus having the monolithic LED micro-display

Methods and devices for fabricating AlGaN/GaN normally-off high electron mobility transistors (HEMTs). A fluorine-based (electronegative ions-based) plasma treatment or low-energy ion implantation is used to modify the drain-side surface field distribution without the use of a field plate electrode. The off-state breakdown voltage can be improved and current collapse can be completely suppressed in LDD-HEMTs with no significant degradation in gains and cutoff frequencies.

Low density drain HEMTs

A method for and devices utilizing monolithic integration of enhancement-mode and depletion-mode AlGaN/GaN heterojunction field-effect transistors (HFETs) is disclosed. Source and drain ohmic contacts of HFETs are first defined. Gate electrodes of the depletion-mode HFETs are then defined. Gate electrodes of the enhancement-mode HFETs are then defined using fluoride-based plasma treatment and high temperature post-gate annealing of the sample. Device isolation is achieved by either mesa etching or fluoride-based plasma treatment. This method provides a complete planar process for GaN-based integrated circuits favored in high-density and high-speed applications.

Growing community of inventors

Hong Kong, China

Kei May Lau