Skhynix Inc.

KeeSoo Kim

Taehyung Jung

A semiconductor memory includes a circuit block that is configured to receive a test mode command, a first sense amplifier that is coupled to sense and amplify a state of a first memory cell when enabled, and a second sense amplifier that is coupled to sense and amplify a state of a second memory cell when enabled. In an active cycle, the circuit block generates one or more control signals in response to the test mode command that cause the second sense amplifier to be enabled a predetermined amount of time after the first sense amplifier is enabled.

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Cheong-ju, South Korea

KeeSoo Kim