Samsung Electronics Co., Ltd.

Keeshik Park

Jaerok Kahng

Jinwoo Lee

Jungwoo Song

Joon-Seok Moon

Sang-Jun Lee

Dong-Soo Woo

Yongjun Kim

Donggyun Han

A memory device includes a substrate including active areas and isolation areas, trenches in the isolation areas, active patterns in the active areas, the active patterns protruding from the substrate, isolation layers filling the trenches, gate trenches crossing the active patterns and the isolation layers, and gate line stacks filling the gate trenches, a first width of the gate trench in the isolation layer being greater than a second width of the gate trench in the active pattern.

Memory device having buried gate and method of fabricating the same

Semiconductor devices and dynamic random access memory devices including a buried gate electrode are provided, the semiconductor devices include a substrate with a gate trench, a buried gate electrode partially filling the inside of the gate trench, a capping layer pattern in the gate trench and over the buried gate electrode, source/drain regions below an upper surface of the substrate and adjacent to both sides of the buried gate electrode, and a gate insulation layer interposed between the trench and the buried gate electrode. The capping layer pattern includes a high-k material layer that directly contacts an upper surface of the buried gate electrode.

Semiconductor devices and dynamic random access memory devices including buried gate pattern with high-k capping layer

Growing community of inventors

Hwaseong-si, South Korea

Keeshik Park