Samsung Electronics Co., Ltd.

Kee-Young Jun

Sang-Hoon Ahn

Jang-Hee Lee

Jong-Min Baek

Thomas Oszinda

Kaoru Yamamoto

Geun-O Jeong

Tae-Jin Yim

Sung-Joo An

Nae-in Lee

Chang-Hyun Kim

Hyeon-jin Shin

Chang-Seok Lee

Hyun-Jae Song

Byung Hee Kim

Jeon-Il Lee

Woo-Kyung You

Keun-Wook Shin

A semiconductor manufacturing apparatus includes a process chamber. An insulating plate divides an interior space of the process chamber into a first space and a second space and thermally isolates the first space from the second space. A gas supplier is configured to supply a process gas to the first space. A radiator is configured to heat the first space. A stage is disposed within the second space and the stage is configured to support a substrate.

Semiconductor manufacturing apparatus having an insulating plate

In a plasma deposition method, a substrate is loaded onto a substrate stage within a chamber. A first plasma is generated at a region separated from the substrate by a first distance. A first process gas is supplied to the first plasma region to perform a pre-treatment process on the substrate. A second plasma is generated at a region separated from the substrate by a second distance different from the first distance. A second process gas is supplied to the second plasma region to perform a deposition process on the substrate.

Plasma deposition method, plasma deposition apparatus and method of manufacturing semiconductor device

A semiconductor device includes an insulating interlayer on a first region of a substrate. The insulating interlayer has a recess therein and includes a low-k material having porosity. A damage curing layer is formed on an inner surface of the recess. A barrier pattern is formed on the damage curing layer. A copper structure fills the recess and is disposed on the barrier pattern. The copper structure includes a copper pattern and a copper-manganese capping pattern covering a surface of the copper pattern. A diffusion of metal in a wiring structure of the semiconductor device may be prevented, and thus a resistance of the wiring structure may decrease.

Copper via with barrier layer and cap layer

A semiconductor device is provided. The semiconductor device includes a first porous interlayer insulating film having a low dielectric constant and including a first region and a second region, a second interlayer insulating film formed on the first interlayer insulating film in the first region, a plurality of first conductive patterns formed in the second interlayer insulating film such that the plurality of first conductive patterns are spaced apart from each other, at least one second conductive pattern formed in the first interlayer insulating film in the second region and air gaps disposed at lateral sides of the plurality of first conductive patterns.

Semiconductor device and method of manufacturing the same

Growing community of inventors

Seongnam-si, South Korea

Kee-Young Jun