Konkuk University Industrial Cooperation Corp

Samsung Display Co., Ltd.

Electronics and Telecommunications Research Institute

Kee Chan Park

Joon Ho Lee

Byoung Gon Yu

Chi Sun Hwang

Ji Sun Kim

Sang Hee Park

Him Chan Oh

Jae Eun Pi

Ki Bum Kim

Tae Hoon Yang

Jong Chan Lee

Woong Hee Jeong

Sung Min Yoon

Byeong Hoon Kim

Min Woo Oh

Tao Ren

Hong Kyun Leem

Kyung Ho Kim

Chong Chul Chai

Yi Kyoung You

Dongwoo Kim

Dong Woo Kim

Min Jae Jeong

Kyung Hoon Chung

Chongchul Chai

Sang Yong No

Gi Chang Lee

Min Ki Ryu

Hyang A Park

Minkyu Woo

Youn Kyung Kim

Joon Dong Kim

Hong Kyung Leem

A scan signal driver includes: stages to sequentially output scan signals in an active period, and to selectively output sensing signals in a vertical blank period. At least one of the stages includes: a sensing control circuit to supply a gate-on voltage to a sensing control node in response to a holding control signal during the active period, and to output the gate-on voltage of the sensing control node in response to a selectively input line select signal during the vertical blank period; an output node control circuit to supply the gate-on voltage to a pull-up node when the gate-on voltage of the sensing control node is output during the vertical blank period; and an output circuit to output a scan clock signal as a sensing signal to one of scan signal lines when the gate-on voltage is supplied to the pull-up node during the vertical blank period.

Scan signal driver and display device including the same

A scan signal driver includes: a plurality of stages configured to be driven by dividing a first frame period into a display period and a sensing period, and to sequentially output scan signals at the display period, wherein each of the plurality of stages comprises: an output control circuit; and a memory control circuit, wherein the scan driver is configured to: irregularly set a specific stage of the plurality of stages at a display period every frame; control the specific stage to: store a voltage by using the memory control circuit; and output a sensing signal by using the stored voltage at a sensing period, and the memory control circuit includes: a second memory transistor configured to electrically connect an M node with an I node; and a third memory transistor configured to electrically connect the output control circuit with the I node.

A scan driver includes stage circuits, wherein each of the stage circuits includes a first transistor, wherein a first electrode thereof is coupled to a first node, a second electrode thereof is coupled to an input carry line, and a gate electrode thereof is coupled to a first clock line; and a capacitor, wherein a first electrode thereof is coupled to the first node and a second electrode thereof is coupled to a second node, wherein the second node is coupled to an output carry line, and the second node is selectively coupled to one of a first power voltage line and a second power voltage line.

Scan driving unit

A display apparatus is disclosed, which includes a pixel. The pixel includes first through fifth transistors and a light emitting element. The first transistor includes a control electrode electrically connected to a first node, an input electrode that receives a first power voltage and an output electrode electrically connected to the light emitting element. The second transistor includes a control electrode that receives a scan signal, an input electrode that receives a grayscale data voltage and an output electrode electrically connected to a second node. The third transistor includes a control electrode electrically connected to the second node, an input electrode that receives a reference voltage and an output electrode electrically connected to the first node. The fourth transistor includes a control electrode that receives the scan signal, an input electrode that receives a bias data voltage and an output electrode electrically connected to the first node. The fifth transistor includes a control electrode that receives a sensing control signal, an input electrode that receives an initialization voltage and an output electrode electrically connected to the light emitting element.

Display apparatus

A display device includes a scan write line for receiving a scan write signal, a first driving voltage line for receiving a first driving voltage, a first data line for receiving first data voltages, a second data line for receiving second data voltages, and a sub-pixel connected to the scan write line, the first data line, the second data line, and the first driving voltage line, wherein the sub-pixel includes a light emitting element connected to the first driving voltage line, a constant current generator configured to apply a driving current to the light emitting element according to a first data voltage among the first data voltages of the first data line, and a light emission period controller configured to control a light emission period of the light emitting element according to a second data voltage among the second data voltages of the second data line.

Display device having two data lines for outputting different data voltages

A display device includes: a plurality of pixels, each of which is connected to a corresponding one of a plurality of scan lines, and a scan driver including a plurality of stages, each of which supplies a scan signal to a corresponding one of the scan lines, each of the stages includes: a node controller which supplies a second output signal of a previous stage to a first node based on an input signal of a first clock terminal or a first output signal of the previous stage, a first inverter connected between the first node and a second node, a buffer which supplies a voltage of the second node to a first output terminal based on an input signal of a second clock terminal, and a second inverter connected between the first output terminal and a second output terminal.

Display device with improved current drive, reduced circuit area and power consumption

An emission signal driver comprises stages connected to emission lines. Each of the stages includes a node controller which supplies a start signal or a carry signal, which is input to a start terminal, to a first node in response to a clock signal input to a clock terminal, a first inverter connected between the first node and a second node, and a second inverter connected between the second node and an output terminal.

Emission signal driver and display device including the same

Disclosed are an inverter, a NAND gate, and a NOR gate. The inverter includes: a pull-up unit constituted by a second thin film transistor outputting a first power voltage to an output terminal according to a voltage applied to a gate; a pull-down unit constituted by a fifth thin film transistor outputting a ground voltage to the output terminal according to an input signal applied to a gate; and a pull-up driver applying a second power voltage or the ground voltage to the gate of the second thin film transistor according to the input signal.

Inverter, NAND gate, and NOR gate

Disclosed is a DC voltage conversion circuit of a liquid crystal display apparatus, including: a main pumping circuit including a plurality of thin film transistors and configured to output voltage for driving a liquid crystal display apparatus when the plurality of thin film transistors are alternately turned on or off; and a switch control signal generator configured to control voltages applied to gates of the plurality of thin film transistors by inversion of a clock signal, in which each thin film transistor is turned on when positive gate-source voltage is applied thereto, and turned off when negative gate-source voltage is applied thereto.

DC voltage conversion circuit of liquid crystal display apparatus

Growing community of inventors

Seoul, South Korea

Kee Chan Park