Chengdu Pbm Technology Ltd.

Sichuan University

Chongqing Zhien Pharmaceutical Co., Ltd.

Ke Wang

Yong Qin

Xiaolin Wang

Shan Huang

Xianglin Deng

Guofeng Yu

Xuan Zhou

Provided are an underlying transistor circuit of a semiconductor memory and a preparation method for the same. The circuit includes a row line layer, a column line layer positioned above the row line layer, and an insulating isolation layer between the row line layer and the column line layer, with directions of the row lines and the column lines being perpendicular to each other. Holes penetrating the column line layer and the insulating isolation layer are provided at intersections of row lines and column lines; upper and lower segments of the hole are both filled with semiconductor materials; the semiconductor material in the upper segment of the hole has a doping type the same as that of the row line, while the semiconductor material in the lower segment of the hole has a doping type opposite to that of the row line, thus, a transistor is formed in each hole.

Underlying transistor circuit of semiconductor memory and preparation method for the same

Growing community of inventors

Sichuan, China

Ke Wang